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9418 iwn: rate array in struct iwn_ks_txpower should have size IWN_RIDX_MAX+1
Reviewed by: Marcel Telka <marcel@telka.sk>
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Andy Fiddaman <omnios@citrus-it.co.uk>
Approved by: Dan McDonald <danmcd@joyent.com>

*** 595,605 **** (void) snprintf(tmp, KSTAT_STRLEN - 1, "Ant %d temperature compensation", i); kstat_named_init(&sc->sc_txpower->txchain[i].tcomp, tmp, KSTAT_DATA_LONG); ! for (r = 0; r != IWN_RIDX_MAX; r++) { (void) snprintf(tmp, KSTAT_STRLEN - 1, "Ant %d Rate %d RF gain", i, r); kstat_named_init( &sc->sc_txpower->txchain[i].rate[r].rf_gain, tmp, KSTAT_DATA_LONG); --- 595,605 ---- (void) snprintf(tmp, KSTAT_STRLEN - 1, "Ant %d temperature compensation", i); kstat_named_init(&sc->sc_txpower->txchain[i].tcomp, tmp, KSTAT_DATA_LONG); ! for (r = 0; r <= IWN_RIDX_MAX; r++) { (void) snprintf(tmp, KSTAT_STRLEN - 1, "Ant %d Rate %d RF gain", i, r); kstat_named_init( &sc->sc_txpower->txchain[i].rate[r].rf_gain, tmp, KSTAT_DATA_LONG);
*** 2047,2057 **** (void) ddi_dma_sync(data->dma_data.dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV); } /* Clear TX descriptors. */ ! memset(ring->desc, 0, ring->desc_dma.size); (void) ddi_dma_sync(ring->desc_dma.dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV); sc->qfullmsk &= ~(1 << ring->qid); ring->queued = 0; ring->cur = 0; } --- 2047,2057 ---- (void) ddi_dma_sync(data->dma_data.dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV); } /* Clear TX descriptors. */ ! (void) memset(ring->desc, 0, ring->desc_dma.size); (void) ddi_dma_sync(ring->desc_dma.dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV); sc->qfullmsk &= ~(1 << ring->qid); ring->queued = 0; ring->cur = 0; }
*** 2078,2088 **** { /* Disable interrupts. */ IWN_WRITE(sc, IWN_INT_MASK, 0); /* Reset ICT table. */ ! memset(sc->ict, 0, IWN_ICT_SIZE); sc->ict_cur = 0; /* Set physical address of ICT table (4KB aligned). */ IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE | IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12); --- 2078,2088 ---- { /* Disable interrupts. */ IWN_WRITE(sc, IWN_INT_MASK, 0); /* Reset ICT table. */ ! (void) memset(sc->ict, 0, IWN_ICT_SIZE); sc->ict_cur = 0; /* Set physical address of ICT table (4KB aligned). */ IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE | IWN_DRAM_INT_TBL_WRAP_CHECK | sc->ict_dma.paddr >> 12);
*** 2374,2384 **** iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2); base = le16toh(val); iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO, enhinfo, sizeof enhinfo); ! memset(sc->enh_maxpwr, 0, sizeof sc->enh_maxpwr); for (i = 0; i < __arraycount(enhinfo); i++) { if (enhinfo[i].chan == 0 || enhinfo[i].reserved != 0) continue; /* Skip invalid entries. */ maxpwr = 0; --- 2374,2384 ---- iwn_read_prom_data(sc, IWN5000_EEPROM_REG, &val, 2); base = le16toh(val); iwn_read_prom_data(sc, base + IWN6000_EEPROM_ENHINFO, enhinfo, sizeof enhinfo); ! (void) memset(sc->enh_maxpwr, 0, sizeof sc->enh_maxpwr); for (i = 0; i < __arraycount(enhinfo); i++) { if (enhinfo[i].chan == 0 || enhinfo[i].reserved != 0) continue; /* Skip invalid entries. */ maxpwr = 0;
*** 2633,2643 **** sizeof (*stat), DDI_DMA_SYNC_FORKERNEL); DTRACE_PROBE1(rx__phy, struct iwn_rx_stat *, stat); /* Save RX statistics, they will be used on MPDU_RX_DONE. */ ! memcpy(&sc->last_rx_stat, stat, sizeof (*stat)); sc->last_rx_valid = 1; } /* * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification. --- 2633,2643 ---- sizeof (*stat), DDI_DMA_SYNC_FORKERNEL); DTRACE_PROBE1(rx__phy, struct iwn_rx_stat *, stat); /* Save RX statistics, they will be used on MPDU_RX_DONE. */ ! (void) memcpy(&sc->last_rx_stat, stat, sizeof (*stat)); sc->last_rx_valid = 1; } /* * Process an RX_DONE (4965AGN only) or MPDU_RX_DONE firmware notification.
*** 2816,2826 **** sc->calibcmd[idx].buf = kmem_zalloc(len, KM_NOSLEEP); if (sc->calibcmd[idx].buf == NULL) { return; } sc->calibcmd[idx].len = len; ! memcpy(sc->calibcmd[idx].buf, calib, len); } /* * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification. * The latter is sent by the firmware after each received beacon. --- 2816,2826 ---- sc->calibcmd[idx].buf = kmem_zalloc(len, KM_NOSLEEP); if (sc->calibcmd[idx].buf == NULL) { return; } sc->calibcmd[idx].len = len; ! (void) memcpy(sc->calibcmd[idx].buf, calib, len); } /* * Process an RX_STATISTICS or BEACON_STATISTICS firmware notification. * The latter is sent by the firmware after each received beacon.
*** 3086,3096 **** "!microcontroller initialization failed"); break; } if (uc->subtype == IWN_UCODE_INIT) { /* Save microcontroller report. */ ! memcpy(&sc->ucode_info, uc, sizeof (*uc)); } /* Save the address of the error log in SRAM. */ sc->errptr = le32toh(uc->errptr); break; } --- 3086,3096 ---- "!microcontroller initialization failed"); break; } if (uc->subtype == IWN_UCODE_INIT) { /* Save microcontroller report. */ ! (void) memcpy(&sc->ucode_info, uc, sizeof (*uc)); } /* Save the address of the error log in SRAM. */ sc->errptr = le32toh(uc->errptr); break; }
*** 3928,3938 **** tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr)); tx->hiaddr = IWN_HIADDR(data->scratch_paddr); /* Copy 802.11 header in TX command. */ /* XXX NetBSD changed this in rev 1.20 */ ! memcpy(((uint8_t *)tx) + sizeof(*tx), wh, hdrlen); mp->b_rptr += hdrlen; bcopy(mp->b_rptr, data->dma_data.vaddr, totlen - hdrlen); tx->security = 0; tx->flags = htole32(flags); --- 3928,3938 ---- tx->loaddr = htole32(IWN_LOADDR(data->scratch_paddr)); tx->hiaddr = IWN_HIADDR(data->scratch_paddr); /* Copy 802.11 header in TX command. */ /* XXX NetBSD changed this in rev 1.20 */ ! (void) memcpy(((uint8_t *)tx) + sizeof(*tx), wh, hdrlen); mp->b_rptr += hdrlen; bcopy(mp->b_rptr, data->dma_data.vaddr, totlen - hdrlen); tx->security = 0; tx->flags = htole32(flags);
*** 4429,4439 **** cmd->code = code; cmd->flags = 0; cmd->qid = ring->qid; cmd->idx = ring->cur; bzero(cmd->data, size); ! memcpy(cmd->data, buf, size); bzero(desc, sizeof(*desc)); desc->nsegs = 1; desc->segs[0].addr = htole32(IWN_LOADDR(paddr)); desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4); --- 4429,4439 ---- cmd->code = code; cmd->flags = 0; cmd->qid = ring->qid; cmd->idx = ring->cur; bzero(cmd->data, size); ! (void) memcpy(cmd->data, buf, size); bzero(desc, sizeof(*desc)); desc->nsegs = 1; desc->segs[0].addr = htole32(IWN_LOADDR(paddr)); desc->segs[0].len = htole16(IWN_HIADDR(paddr) | totlen << 4);
*** 4483,4495 **** * a superset of the one for 4965AGN). We thus copy the common * fields before sending the command. */ src = (char *)node; dst = (char *)&hnode; ! memcpy(dst, src, 48); /* Skip TSC, RX MIC and TX MIC fields from ``src''. */ ! memcpy(dst + 48, src + 72, 20); return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async); } static int iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async) --- 4483,4495 ---- * a superset of the one for 4965AGN). We thus copy the common * fields before sending the command. */ src = (char *)node; dst = (char *)&hnode; ! (void) memcpy(dst, src, 48); /* Skip TSC, RX MIC and TX MIC fields from ``src''. */ ! (void) memcpy(dst + 48, src + 72, 20); return iwn_cmd(sc, IWN_CMD_ADD_NODE, &hnode, sizeof hnode, async); } static int iwn5000_add_node(struct iwn_softc *sc, struct iwn_node_info *node, int async)
*** 4509,4519 **** int i, txrate; /* Use the first valid TX antenna. */ txant = IWN_LSB(sc->txchainmask); ! memset(&linkq, 0, sizeof linkq); linkq.id = wn->id; linkq.antmsk_1stream = txant; linkq.antmsk_2stream = IWN_ANT_AB; linkq.ampdu_max = 31; linkq.ampdu_threshold = 3; --- 4509,4519 ---- int i, txrate; /* Use the first valid TX antenna. */ txant = IWN_LSB(sc->txchainmask); ! (void) memset(&linkq, 0, sizeof linkq); linkq.id = wn->id; linkq.antmsk_1stream = txant; linkq.antmsk_2stream = IWN_ANT_AB; linkq.ampdu_max = 31; linkq.ampdu_threshold = 3;
*** 4544,4564 **** struct iwn_cmd_link_quality linkq; const struct iwn_rate *rinfo; uint8_t txant; int i, error; ! memset(&node, 0, sizeof node); IEEE80211_ADDR_COPY(node.macaddr, etherbroadcastaddr); node.id = sc->broadcast_id; DTRACE_PROBE(add__broadcast__node); if ((error = ops->add_node(sc, &node, async)) != 0) return error; /* Use the first valid TX antenna. */ txant = IWN_LSB(sc->txchainmask); ! memset(&linkq, 0, sizeof linkq); linkq.id = sc->broadcast_id; linkq.antmsk_1stream = txant; linkq.antmsk_2stream = IWN_ANT_AB; linkq.ampdu_max = 64; linkq.ampdu_threshold = 3; --- 4544,4564 ---- struct iwn_cmd_link_quality linkq; const struct iwn_rate *rinfo; uint8_t txant; int i, error; ! (void) memset(&node, 0, sizeof node); IEEE80211_ADDR_COPY(node.macaddr, etherbroadcastaddr); node.id = sc->broadcast_id; DTRACE_PROBE(add__broadcast__node); if ((error = ops->add_node(sc, &node, async)) != 0) return error; /* Use the first valid TX antenna. */ txant = IWN_LSB(sc->txchainmask); ! (void) memset(&linkq, 0, sizeof linkq); linkq.id = sc->broadcast_id; linkq.antmsk_1stream = txant; linkq.antmsk_2stream = IWN_ANT_AB; linkq.ampdu_max = 64; linkq.ampdu_threshold = 3;
*** 4615,4625 **** else temp = 110; sc->sc_misc->crit_temp.value.ul = temp; ! memset(&crit, 0, sizeof crit); crit.tempR = htole32(temp); return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0); } static int --- 4615,4625 ---- else temp = 110; sc->sc_misc->crit_temp.value.ul = temp; ! (void) memset(&crit, 0, sizeof crit); crit.tempR = htole32(temp); return iwn_cmd(sc, IWN_CMD_SET_CRITICAL_TEMP, &crit, sizeof crit, 0); } static int
*** 4626,4637 **** iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni) { struct iwn_cmd_timing cmd; uint64_t val, mod; ! memset(&cmd, 0, sizeof cmd); ! memcpy(&cmd.tstamp, ni->in_tstamp.data, sizeof (uint64_t)); cmd.bintval = htole16(ni->in_intval); cmd.lintval = htole16(10); /* Compute remaining time until next beacon. */ val = (uint64_t)ni->in_intval * 1024; /* msecs -> usecs */ --- 4626,4637 ---- iwn_set_timing(struct iwn_softc *sc, struct ieee80211_node *ni) { struct iwn_cmd_timing cmd; uint64_t val, mod; ! (void) memset(&cmd, 0, sizeof cmd); ! (void) memcpy(&cmd.tstamp, ni->in_tstamp.data, sizeof (uint64_t)); cmd.bintval = htole16(ni->in_intval); cmd.lintval = htole16(10); /* Compute remaining time until next beacon. */ val = (uint64_t)ni->in_intval * 1024; /* msecs -> usecs */
*** 4686,4696 **** /* Retrieve current channel from last RXON. */ chan = sc->rxon.chan; sc->sc_txpower->chan.value.l = chan; ch = &ic->ic_sup_channels[chan]; ! memset(&cmd, 0, sizeof cmd); cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1; cmd.chan = chan; if (IEEE80211_IS_CHAN_5GHZ(ch)) { maxpwr = sc->maxpwr5GHz; --- 4686,4696 ---- /* Retrieve current channel from last RXON. */ chan = sc->rxon.chan; sc->sc_txpower->chan.value.l = chan; ch = &ic->ic_sup_channels[chan]; ! (void) memset(&cmd, 0, sizeof cmd); cmd.band = IEEE80211_IS_CHAN_5GHZ(ch) ? 0 : 1; cmd.chan = chan; if (IEEE80211_IS_CHAN_5GHZ(ch)) { maxpwr = sc->maxpwr5GHz;
*** 4811,4821 **** /* * TX power calibration is handled automatically by the firmware * for 5000 Series. */ ! memset(&cmd, 0, sizeof cmd); cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */ cmd.flags = IWN5000_TXPOWER_NO_CLOSED; cmd.srv_limit = IWN5000_TXPOWER_AUTO; return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async); } --- 4811,4821 ---- /* * TX power calibration is handled automatically by the firmware * for 5000 Series. */ ! (void) memset(&cmd, 0, sizeof cmd); cmd.global_limit = 2 * IWN5000_TXPOWER_MAX_DBM; /* 16 dBm */ cmd.flags = IWN5000_TXPOWER_NO_CLOSED; cmd.srv_limit = IWN5000_TXPOWER_AUTO; return iwn_cmd(sc, IWN_CMD_TXPOWER_DBM, &cmd, sizeof cmd, async); }
*** 4933,4943 **** struct iwn_calib_state *calib = &sc->calib; uint32_t flags; int error; /* Reset calibration state machine. */ ! memset(calib, 0, sizeof (*calib)); calib->state = IWN_CALIB_STATE_INIT; calib->cck_state = IWN_CCK_STATE_HIFA; /* Set initial correlation values. */ calib->ofdm_x1 = sc->limits->min_ofdm_x1; calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1; --- 4933,4943 ---- struct iwn_calib_state *calib = &sc->calib; uint32_t flags; int error; /* Reset calibration state machine. */ ! (void) memset(calib, 0, sizeof (*calib)); calib->state = IWN_CALIB_STATE_INIT; calib->cck_state = IWN_CCK_STATE_HIFA; /* Set initial correlation values. */ calib->ofdm_x1 = sc->limits->min_ofdm_x1; calib->ofdm_mrc_x1 = sc->limits->min_ofdm_mrc_x1;
*** 5017,5027 **** static int iwn4965_init_gains(struct iwn_softc *sc) { struct iwn_phy_calib_gain cmd; ! memset(&cmd, 0, sizeof cmd); cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN; /* Differential gains initially set to 0 for all 3 antennas. */ return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1); } --- 5017,5027 ---- static int iwn4965_init_gains(struct iwn_softc *sc) { struct iwn_phy_calib_gain cmd; ! (void) memset(&cmd, 0, sizeof cmd); cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN; /* Differential gains initially set to 0 for all 3 antennas. */ return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1); }
*** 5028,5038 **** static int iwn5000_init_gains(struct iwn_softc *sc) { struct iwn_phy_calib cmd; ! memset(&cmd, 0, sizeof cmd); cmd.code = sc->reset_noise_gain; cmd.ngroups = 1; cmd.isvalid = 1; return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1); } --- 5028,5038 ---- static int iwn5000_init_gains(struct iwn_softc *sc) { struct iwn_phy_calib cmd; ! (void) memset(&cmd, 0, sizeof cmd); cmd.code = sc->reset_noise_gain; cmd.ngroups = 1; cmd.isvalid = 1; return iwn_cmd(sc, IWN_CMD_PHY_CALIB, &cmd, sizeof cmd, 1); }
*** 5048,5058 **** noise = INT_MAX; /* NB: There's at least one antenna. */ for (i = 0; i < 3; i++) if (sc->chainmask & (1 << i)) noise = MIN(calib->noise[i], noise); ! memset(&cmd, 0, sizeof cmd); cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN; /* Set differential gains for connected antennas. */ for (i = 0; i < 3; i++) { if (sc->chainmask & (1 << i)) { /* Compute attenuation (in unit of 1.5dB). */ --- 5048,5058 ---- noise = INT_MAX; /* NB: There's at least one antenna. */ for (i = 0; i < 3; i++) if (sc->chainmask & (1 << i)) noise = MIN(calib->noise[i], noise); ! (void) memset(&cmd, 0, sizeof cmd); cmd.code = IWN4965_PHY_CALIB_DIFF_GAIN; /* Set differential gains for connected antennas. */ for (i = 0; i < 3; i++) { if (sc->chainmask & (1 << i)) { /* Compute attenuation (in unit of 1.5dB). */
*** 5076,5086 **** int i, ant, div, delta; /* We collected 20 beacons and !=6050 need a 1.5 factor. */ div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30; ! memset(&cmd, 0, sizeof cmd); cmd.code = sc->noise_gain; cmd.ngroups = 1; cmd.isvalid = 1; /* Get first available RX antenna as referential. */ ant = IWN_LSB(sc->rxchainmask); --- 5076,5086 ---- int i, ant, div, delta; /* We collected 20 beacons and !=6050 need a 1.5 factor. */ div = (sc->hw_type == IWN_HW_REV_TYPE_6050) ? 20 : 30; ! (void) memset(&cmd, 0, sizeof cmd); cmd.code = sc->noise_gain; cmd.ngroups = 1; cmd.isvalid = 1; /* Get first available RX antenna as referential. */ ant = IWN_LSB(sc->rxchainmask);
*** 5255,5265 **** { struct iwn_calib_state *calib = &sc->calib; struct iwn_enhanced_sensitivity_cmd cmd; int len; ! memset(&cmd, 0, sizeof cmd); len = sizeof (struct iwn_sensitivity_cmd); cmd.which = IWN_SENSITIVITY_WORKTBL; /* OFDM modulation. */ cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1); cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1); --- 5255,5265 ---- { struct iwn_calib_state *calib = &sc->calib; struct iwn_enhanced_sensitivity_cmd cmd; int len; ! (void) memset(&cmd, 0, sizeof cmd); len = sizeof (struct iwn_sensitivity_cmd); cmd.which = IWN_SENSITIVITY_WORKTBL; /* OFDM modulation. */ cmd.corr_ofdm_x1 = htole16(calib->ofdm_x1); cmd.corr_ofdm_mrc_x1 = htole16(calib->ofdm_mrc_x1);
*** 5318,5328 **** else if (dtim <= 10) pmgt = &iwn_pmgt[1][level]; else pmgt = &iwn_pmgt[2][level]; ! memset(&cmd, 0, sizeof cmd); if (level != 0) /* not CAM */ cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP); if (level == 5) cmd.flags |= htole16(IWN_PS_FAST_PD); /* Retrieve PCIe Active State Power Management (ASPM). */ --- 5318,5328 ---- else if (dtim <= 10) pmgt = &iwn_pmgt[1][level]; else pmgt = &iwn_pmgt[2][level]; ! (void) memset(&cmd, 0, sizeof cmd); if (level != 0) /* not CAM */ cmd.flags |= htole16(IWN_PS_ALLOW_SLEEP); if (level == 5) cmd.flags |= htole16(IWN_PS_FAST_PD); /* Retrieve PCIe Active State Power Management (ASPM). */
*** 5357,5367 **** int iwn5000_runtime_calib(struct iwn_softc *sc) { struct iwn5000_calib_config cmd; ! memset(&cmd, 0, sizeof cmd); cmd.ucode.once.enable = 0xffffffff; cmd.ucode.once.start = IWN5000_CALIB_DC; return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0); } --- 5357,5367 ---- int iwn5000_runtime_calib(struct iwn_softc *sc) { struct iwn5000_calib_config cmd; ! (void) memset(&cmd, 0, sizeof cmd); cmd.ucode.once.enable = 0xffffffff; cmd.ucode.once.start = IWN5000_CALIB_DC; return iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof(cmd), 0); }
*** 5368,5378 **** static int iwn_config_bt_coex_bluetooth(struct iwn_softc *sc) { struct iwn_bluetooth bluetooth; ! memset(&bluetooth, 0, sizeof bluetooth); bluetooth.flags = IWN_BT_COEX_ENABLE; bluetooth.lead_time = IWN_BT_LEAD_TIME_DEF; bluetooth.max_kill = IWN_BT_MAX_KILL_DEF; return iwn_cmd(sc, IWN_CMD_BT_COEX, &bluetooth, sizeof bluetooth, 0); --- 5368,5378 ---- static int iwn_config_bt_coex_bluetooth(struct iwn_softc *sc) { struct iwn_bluetooth bluetooth; ! (void) memset(&bluetooth, 0, sizeof bluetooth); bluetooth.flags = IWN_BT_COEX_ENABLE; bluetooth.lead_time = IWN_BT_LEAD_TIME_DEF; bluetooth.max_kill = IWN_BT_MAX_KILL_DEF; return iwn_cmd(sc, IWN_CMD_BT_COEX, &bluetooth, sizeof bluetooth, 0);
*** 5381,5391 **** static int iwn_config_bt_coex_prio_table(struct iwn_softc *sc) { uint8_t prio_table[16]; ! memset(&prio_table, 0, sizeof prio_table); prio_table[ 0] = 6; /* init calibration 1 */ prio_table[ 1] = 7; /* init calibration 2 */ prio_table[ 2] = 2; /* periodic calib low 1 */ prio_table[ 3] = 3; /* periodic calib low 2 */ prio_table[ 4] = 4; /* periodic calib high 1 */ --- 5381,5391 ---- static int iwn_config_bt_coex_prio_table(struct iwn_softc *sc) { uint8_t prio_table[16]; ! (void) memset(&prio_table, 0, sizeof prio_table); prio_table[ 0] = 6; /* init calibration 1 */ prio_table[ 1] = 7; /* init calibration 2 */ prio_table[ 2] = 2; /* periodic calib low 1 */ prio_table[ 3] = 3; /* periodic calib low 2 */ prio_table[ 4] = 4; /* periodic calib high 1 */
*** 5441,5451 **** "!could not configure send BT priority table"); return error; } /* Force BT state machine change */ ! memset(&btprot, 0, sizeof btprot); btprot.open = 1; btprot.type = 1; error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof btprot, 1); if (error != 0) { dev_err(sc->sc_dip, CE_WARN, "!could not open BT protcol"); --- 5441,5451 ---- "!could not configure send BT priority table"); return error; } /* Force BT state machine change */ ! (void) memset(&btprot, 0, sizeof btprot); btprot.open = 1; btprot.type = 1; error = iwn_cmd(sc, IWN_CMD_BT_COEX_PROT, &btprot, sizeof btprot, 1); if (error != 0) { dev_err(sc->sc_dip, CE_WARN, "!could not open BT protcol");
*** 5464,5474 **** static int iwn_config_bt_coex_adv1(struct iwn_softc *sc) { struct iwn_bt_adv1 d; ! memset(&d, 0, sizeof d); d.prio_boost = IWN_BT_PRIO_BOOST_DEF; d.tx_prio_boost = 0; d.rx_prio_boost = 0; return iwn_config_bt_coex_adv_config(sc, &d.basic, sizeof d); } --- 5464,5474 ---- static int iwn_config_bt_coex_adv1(struct iwn_softc *sc) { struct iwn_bt_adv1 d; ! (void) memset(&d, 0, sizeof d); d.prio_boost = IWN_BT_PRIO_BOOST_DEF; d.tx_prio_boost = 0; d.rx_prio_boost = 0; return iwn_config_bt_coex_adv_config(sc, &d.basic, sizeof d); }
*** 5476,5486 **** static int iwn_config_bt_coex_adv2(struct iwn_softc *sc) { struct iwn_bt_adv2 d; ! memset(&d, 0, sizeof d); d.prio_boost = IWN_BT_PRIO_BOOST_DEF; d.tx_prio_boost = 0; d.rx_prio_boost = 0; return iwn_config_bt_coex_adv_config(sc, &d.basic, sizeof d); } --- 5476,5486 ---- static int iwn_config_bt_coex_adv2(struct iwn_softc *sc) { struct iwn_bt_adv2 d; ! (void) memset(&d, 0, sizeof d); d.prio_boost = IWN_BT_PRIO_BOOST_DEF; d.tx_prio_boost = 0; d.rx_prio_boost = 0; return iwn_config_bt_coex_adv_config(sc, &d.basic, sizeof d); }
*** 5545,5555 **** return error; } } /* Set mode, channel, RX filter and enable RX. */ ! memset(&sc->rxon, 0, sizeof (struct iwn_rxon)); IEEE80211_ADDR_COPY(sc->rxon.myaddr, ic->ic_macaddr); IEEE80211_ADDR_COPY(sc->rxon.wlap, ic->ic_macaddr); sc->rxon.chan = ieee80211_chan2ieee(ic, ic->ic_ibss_chan); sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF); if (IEEE80211_IS_CHAN_2GHZ(ic->ic_ibss_chan)) --- 5545,5555 ---- return error; } } /* Set mode, channel, RX filter and enable RX. */ ! (void) memset(&sc->rxon, 0, sizeof (struct iwn_rxon)); IEEE80211_ADDR_COPY(sc->rxon.myaddr, ic->ic_macaddr); IEEE80211_ADDR_COPY(sc->rxon.wlap, ic->ic_macaddr); sc->rxon.chan = ieee80211_chan2ieee(ic, ic->ic_ibss_chan); sc->rxon.flags = htole32(IWN_RXON_TSF | IWN_RXON_CTS_TO_SELF); if (IEEE80211_IS_CHAN_2GHZ(ic->ic_ibss_chan))
*** 5756,5773 **** is_active = 0; essid = (struct iwn_scan_essid *)(tx + 1); if (ic->ic_des_esslen != 0) { char essidstr[IEEE80211_NWID_LEN+1]; ! memcpy(essidstr, ic->ic_des_essid, ic->ic_des_esslen); essidstr[ic->ic_des_esslen] = '\0'; DTRACE_PROBE1(scan__direct, char *, essidstr); essid[0].id = IEEE80211_ELEMID_SSID; essid[0].len = ic->ic_des_esslen; ! memcpy(essid[0].data, ic->ic_des_essid, ic->ic_des_esslen); is_active = 1; /* hdr->crc_threshold = 0x1; */ hdr->scan_flags = htole32(IWN_SCAN_PASSIVE2ACTIVE); } --- 5756,5773 ---- is_active = 0; essid = (struct iwn_scan_essid *)(tx + 1); if (ic->ic_des_esslen != 0) { char essidstr[IEEE80211_NWID_LEN+1]; ! (void) memcpy(essidstr, ic->ic_des_essid, ic->ic_des_esslen); essidstr[ic->ic_des_esslen] = '\0'; DTRACE_PROBE1(scan__direct, char *, essidstr); essid[0].id = IEEE80211_ELEMID_SSID; essid[0].len = ic->ic_des_esslen; ! (void) memcpy(essid[0].data, ic->ic_des_essid, ic->ic_des_esslen); is_active = 1; /* hdr->crc_threshold = 0x1; */ hdr->scan_flags = htole32(IWN_SCAN_PASSIVE2ACTIVE); }
*** 6037,6047 **** /* Fake a join to initialize the TX rate. */ ((struct iwn_node *)ni)->id = IWN_ID_BSS; iwn_newassoc(ni, 1); /* Add BSS node. */ ! memset(&node, 0, sizeof node); IEEE80211_ADDR_COPY(node.macaddr, ni->in_macaddr); node.id = IWN_ID_BSS; #ifdef notyet node.htflags = htole32(IWN_AMDPU_SIZE_FACTOR(3) | IWN_AMDPU_DENSITY(5)); /* 2us */ --- 6037,6047 ---- /* Fake a join to initialize the TX rate. */ ((struct iwn_node *)ni)->id = IWN_ID_BSS; iwn_newassoc(ni, 1); /* Add BSS node. */ ! (void) memset(&node, 0, sizeof node); IEEE80211_ADDR_COPY(node.macaddr, ni->in_macaddr); node.id = IWN_ID_BSS; #ifdef notyet node.htflags = htole32(IWN_AMDPU_SIZE_FACTOR(3) | IWN_AMDPU_DENSITY(5)); /* 2us */
*** 6102,6119 **** kflags = IWN_KFLAG_CCMP | IWN_KFLAG_MAP | IWN_KFLAG_KID(k->k_id); if (k->k_flags & IEEE80211_KEY_GROUP) kflags |= IWN_KFLAG_GROUP; ! memset(&node, 0, sizeof node); node.id = (k->k_flags & IEEE80211_KEY_GROUP) ? sc->broadcast_id : wn->id; node.control = IWN_NODE_UPDATE; node.flags = IWN_FLAG_SET_KEY; node.kflags = htole16(kflags); node.kid = k->k_id; ! memcpy(node.key, k->k_key, k->k_len); DTRACE_PROBE2(set__key, int, k->k_id, int, node.id); return ops->add_node(sc, &node, 1); } static void --- 6102,6119 ---- kflags = IWN_KFLAG_CCMP | IWN_KFLAG_MAP | IWN_KFLAG_KID(k->k_id); if (k->k_flags & IEEE80211_KEY_GROUP) kflags |= IWN_KFLAG_GROUP; ! (void) memset(&node, 0, sizeof node); node.id = (k->k_flags & IEEE80211_KEY_GROUP) ? sc->broadcast_id : wn->id; node.control = IWN_NODE_UPDATE; node.flags = IWN_FLAG_SET_KEY; node.kflags = htole16(kflags); node.kid = k->k_id; ! (void) memcpy(node.key, k->k_key, k->k_len); DTRACE_PROBE2(set__key, int, k->k_id, int, node.id); return ops->add_node(sc, &node, 1); } static void
*** 6131,6141 **** ieee80211_delete_key(ic, ni, k); return; } if (ic->ic_state != IEEE80211_S_RUN) return; /* Nothing to do. */ ! memset(&node, 0, sizeof node); node.id = (k->k_flags & IEEE80211_KEY_GROUP) ? sc->broadcast_id : wn->id; node.control = IWN_NODE_UPDATE; node.flags = IWN_FLAG_SET_KEY; node.kflags = htole16(IWN_KFLAG_INVALID); --- 6131,6141 ---- ieee80211_delete_key(ic, ni, k); return; } if (ic->ic_state != IEEE80211_S_RUN) return; /* Nothing to do. */ ! (void) memset(&node, 0, sizeof node); node.id = (k->k_flags & IEEE80211_KEY_GROUP) ? sc->broadcast_id : wn->id; node.control = IWN_NODE_UPDATE; node.flags = IWN_FLAG_SET_KEY; node.kflags = htole16(IWN_KFLAG_INVALID);
*** 6158,6168 **** struct iwn_softc *sc = ic->ic_softc; struct iwn_ops *ops = &sc->ops; struct iwn_node *wn = (void *)ni; struct iwn_node_info node; ! memset(&node, 0, sizeof node); node.id = wn->id; node.control = IWN_NODE_UPDATE; node.flags = IWN_FLAG_SET_ADDBA; node.addba_tid = tid; node.addba_ssn = htole16(ba->ba_winstart); --- 6158,6168 ---- struct iwn_softc *sc = ic->ic_softc; struct iwn_ops *ops = &sc->ops; struct iwn_node *wn = (void *)ni; struct iwn_node_info node; ! (void) memset(&node, 0, sizeof node); node.id = wn->id; node.control = IWN_NODE_UPDATE; node.flags = IWN_FLAG_SET_ADDBA; node.addba_tid = tid; node.addba_ssn = htole16(ba->ba_winstart);
*** 6181,6191 **** struct iwn_softc *sc = ic->ic_softc; struct iwn_ops *ops = &sc->ops; struct iwn_node *wn = (void *)ni; struct iwn_node_info node; ! memset(&node, 0, sizeof node); node.id = wn->id; node.control = IWN_NODE_UPDATE; node.flags = IWN_FLAG_SET_DELBA; node.delba_tid = tid; DTRACE_PROBE2(delba, uint8_t, wn->id, uint8_t, tid); --- 6181,6191 ---- struct iwn_softc *sc = ic->ic_softc; struct iwn_ops *ops = &sc->ops; struct iwn_node *wn = (void *)ni; struct iwn_node_info node; ! (void) memset(&node, 0, sizeof node); node.id = wn->id; node.control = IWN_NODE_UPDATE; node.flags = IWN_FLAG_SET_DELBA; node.delba_tid = tid; DTRACE_PROBE2(delba, uint8_t, wn->id, uint8_t, tid);
*** 6207,6217 **** struct iwn_node_info node; int error; /* Enable TX for the specified RA/TID. */ wn->disable_tid &= ~(1 << tid); ! memset(&node, 0, sizeof node); node.id = wn->id; node.control = IWN_NODE_UPDATE; node.flags = IWN_FLAG_SET_DISABLE_TID; node.disable_tid = htole16(wn->disable_tid); error = ops->add_node(sc, &node, 1); --- 6207,6217 ---- struct iwn_node_info node; int error; /* Enable TX for the specified RA/TID. */ wn->disable_tid &= ~(1 << tid); ! (void) memset(&node, 0, sizeof node); node.id = wn->id; node.control = IWN_NODE_UPDATE; node.flags = IWN_FLAG_SET_DISABLE_TID; node.disable_tid = htole16(wn->disable_tid); error = ops->add_node(sc, &node, 1);
*** 6371,6381 **** int error; clock_t clk; ASSERT(mutex_owned(&sc->sc_mtx)); ! memset(&cmd, 0, sizeof cmd); cmd.ucode.once.enable = 0xffffffff; cmd.ucode.once.start = 0xffffffff; cmd.ucode.once.send = 0xffffffff; cmd.ucode.flags = 0xffffffff; error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0); --- 6371,6381 ---- int error; clock_t clk; ASSERT(mutex_owned(&sc->sc_mtx)); ! (void) memset(&cmd, 0, sizeof cmd); cmd.ucode.once.enable = 0xffffffff; cmd.ucode.once.start = 0xffffffff; cmd.ucode.once.send = 0xffffffff; cmd.ucode.flags = 0xffffffff; error = iwn_cmd(sc, IWN5000_CMD_CALIB_CONFIG, &cmd, sizeof cmd, 0);
*** 6425,6452 **** wimax.flags = IWN_WIMAX_COEX_ASSOC_WA_UNMASK | IWN_WIMAX_COEX_UNASSOC_WA_UNMASK | IWN_WIMAX_COEX_STA_TABLE_VALID | IWN_WIMAX_COEX_ENABLE; ! memcpy(wimax.events, iwn6050_wimax_events, sizeof iwn6050_wimax_events); } else #endif { /* Disable WiMAX coexistence. */ wimax.flags = 0; ! memset(wimax.events, 0, sizeof wimax.events); } return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0); } static int iwn6000_temp_offset_calib(struct iwn_softc *sc) { struct iwn6000_phy_calib_temp_offset cmd; ! memset(&cmd, 0, sizeof cmd); cmd.code = IWN6000_PHY_CALIB_TEMP_OFFSET; cmd.ngroups = 1; cmd.isvalid = 1; if (sc->eeprom_temp != 0) cmd.offset = htole16(sc->eeprom_temp); --- 6425,6452 ---- wimax.flags = IWN_WIMAX_COEX_ASSOC_WA_UNMASK | IWN_WIMAX_COEX_UNASSOC_WA_UNMASK | IWN_WIMAX_COEX_STA_TABLE_VALID | IWN_WIMAX_COEX_ENABLE; ! (void) memcpy(wimax.events, iwn6050_wimax_events, sizeof iwn6050_wimax_events); } else #endif { /* Disable WiMAX coexistence. */ wimax.flags = 0; ! (void) memset(wimax.events, 0, sizeof wimax.events); } return iwn_cmd(sc, IWN5000_CMD_WIMAX_COEX, &wimax, sizeof wimax, 0); } static int iwn6000_temp_offset_calib(struct iwn_softc *sc) { struct iwn6000_phy_calib_temp_offset cmd; ! (void) memset(&cmd, 0, sizeof cmd); cmd.code = IWN6000_PHY_CALIB_TEMP_OFFSET; cmd.ngroups = 1; cmd.isvalid = 1; if (sc->eeprom_temp != 0) cmd.offset = htole16(sc->eeprom_temp);
*** 6459,6469 **** static int iwn2000_temp_offset_calib(struct iwn_softc *sc) { struct iwn2000_phy_calib_temp_offset cmd; ! memset(&cmd, 0, sizeof cmd); cmd.code = IWN2000_PHY_CALIB_TEMP_OFFSET; cmd.ngroups = 1; cmd.isvalid = 1; if (sc->eeprom_rawtemp != 0) { cmd.offset_low = htole16(sc->eeprom_rawtemp); --- 6459,6469 ---- static int iwn2000_temp_offset_calib(struct iwn_softc *sc) { struct iwn2000_phy_calib_temp_offset cmd; ! (void) memset(&cmd, 0, sizeof cmd); cmd.code = IWN2000_PHY_CALIB_TEMP_OFFSET; cmd.ngroups = 1; cmd.isvalid = 1; if (sc->eeprom_rawtemp != 0) { cmd.offset_low = htole16(sc->eeprom_rawtemp);
*** 6596,6606 **** } if (sc->hw_type != IWN_HW_REV_TYPE_5150) { struct iwn5000_phy_calib_crystal cmd; /* Perform crystal calibration. */ ! memset(&cmd, 0, sizeof cmd); cmd.code = IWN5000_PHY_CALIB_CRYSTAL; cmd.ngroups = 1; cmd.isvalid = 1; cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff; cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff; --- 6596,6606 ---- } if (sc->hw_type != IWN_HW_REV_TYPE_5150) { struct iwn5000_phy_calib_crystal cmd; /* Perform crystal calibration. */ ! (void) memset(&cmd, 0, sizeof cmd); cmd.code = IWN5000_PHY_CALIB_CRYSTAL; cmd.ngroups = 1; cmd.isvalid = 1; cmd.cap_pin[0] = le32toh(sc->eeprom_crystal) & 0xff; cmd.cap_pin[1] = (le32toh(sc->eeprom_crystal) >> 16) & 0xff;
*** 6687,6698 **** clock_t clk; ASSERT(mutex_owned(&sc->sc_mtx)); /* Copy initialization sections into pre-allocated DMA-safe memory. */ ! memcpy(dma->vaddr, fw->init.data, fw->init.datasz); ! memcpy((char *)dma->vaddr + IWN4965_FW_DATA_MAXSZ, fw->init.text, fw->init.textsz); (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV); /* Tell adapter where to find initialization sections. */ if ((error = iwn_nic_lock(sc)) != 0) --- 6687,6698 ---- clock_t clk; ASSERT(mutex_owned(&sc->sc_mtx)); /* Copy initialization sections into pre-allocated DMA-safe memory. */ ! (void) memcpy(dma->vaddr, fw->init.data, fw->init.datasz); ! (void) memcpy((char *)dma->vaddr + IWN4965_FW_DATA_MAXSZ, fw->init.text, fw->init.textsz); (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV); /* Tell adapter where to find initialization sections. */ if ((error = iwn_nic_lock(sc)) != 0)
*** 6728,6739 **** sc->rawtemp = sc->ucode_info.temp[3].chan20MHz; sc->temp = iwn4965_get_temperature(sc); sc->sc_misc->temp.value.ul = sc->temp; /* Copy runtime sections into pre-allocated DMA-safe memory. */ ! memcpy(dma->vaddr, fw->main.data, fw->main.datasz); ! memcpy((char *)dma->vaddr + IWN4965_FW_DATA_MAXSZ, fw->main.text, fw->main.textsz); (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV); /* Tell adapter where to find runtime sections. */ if ((error = iwn_nic_lock(sc)) != 0) --- 6728,6739 ---- sc->rawtemp = sc->ucode_info.temp[3].chan20MHz; sc->temp = iwn4965_get_temperature(sc); sc->sc_misc->temp.value.ul = sc->temp; /* Copy runtime sections into pre-allocated DMA-safe memory. */ ! (void) memcpy(dma->vaddr, fw->main.data, fw->main.datasz); ! (void) memcpy((char *)dma->vaddr + IWN4965_FW_DATA_MAXSZ, fw->main.text, fw->main.textsz); (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV); /* Tell adapter where to find runtime sections. */ if ((error = iwn_nic_lock(sc)) != 0)
*** 6758,6768 **** clock_t clk; ASSERT(mutex_owned(&sc->sc_mtx)); /* Copy firmware section into pre-allocated DMA-safe memory. */ ! memcpy(dma->vaddr, section, size); (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV); if ((error = iwn_nic_lock(sc)) != 0) return error; --- 6758,6768 ---- clock_t clk; ASSERT(mutex_owned(&sc->sc_mtx)); /* Copy firmware section into pre-allocated DMA-safe memory. */ ! (void) memcpy(dma->vaddr, section, size); (void) ddi_dma_sync(dma->dma_hdl, 0, 0, DDI_DMA_SYNC_FORDEV); if ((error = iwn_nic_lock(sc)) != 0) return error;