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NEX-20178 Heavy read load using 10G i40e causes network disconnect
MFV illumos-joyent@83a8d0d616db36010b59cc850d1926c0f6a30de1
OS-7457 i40e Tx freezes on zero descriptors
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Rob Johnston <rob.johnston@joyent.com>
Approved by: Robert Mustacchi <rm@joyent.com>
MFV illumos-joyent@0d3f2b61dcfb18edace4fd257054f6fdbe07c99c
OS-7492 i40e Tx freeze when b_cont chain exceeds 8 descriptors
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Rob Johnston <rob.johnston@joyent.com>
Approved by: Robert Mustacchi <rm@joyent.com>
MFV illumos-joyent@b4bede175d4c50ac1b36078a677b69388f6fb59f
OS-7577 initialize FC for i40e
Reviewed by: Robert Mustacchi <rm@joyent.com>
Approved by: Rob Johnston <rob.johnston@joyent.com>
MFV illumos-joyent@83a8d0d616db36010b59cc850d1926c0f6a30de1
OS-7457 i40e Tx freezes on zero descriptors
Reviewed by: Robert Mustacchi <rm@joyent.com>
Reviewed by: Rob Johnston <rob.johnston@joyent.com>
Approved by: Robert Mustacchi <rm@joyent.com>
MFV: illumos-joyent@61dc3dec4f82a3e13e94609a0a83d5f66c64e760
OS-6846 want i40e multi-group support
OS-7372 i40e_alloc_ring_mem() unwinds when it shouldn't
Reviewed by: Robert Mustacchi <rm@joyent.com>
Approved by: Robert Mustacchi <rm@joyent.com>
Author: Ryan Zezeski <rpz@joyent.com>
MFV: illumos-joyent@757454db6669c1186f60bc625510c1b67217aae6
OS-7082 i40e: blown assert in i40e_tx_cleanup_ring()
OS-7086 i40e: add mdb dcmd to dump info on tx descriptor rings
OS-7101 i40e: add kstat to track TX DMA bind failures
Reviewed by: Ryan Zezeski <rpz@joyent.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
Approved by: Patrick Mooney <patrick.mooney@joyent.com>
Author: Rob Johnston <rob.johnston@joyent.com>
MFV: illumos-joyent@9e30beee2f0c127bf41868db46257124206e28d6
OS-5225 Want Fortville TSO support
Reviewed by: Ryan Zezeski <rpz@joyent.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
Approved by: Patrick Mooney <patrick.mooney@joyent.com>
Author: Rob Johnston <rob.johnston@joyent.com>
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--- old/usr/src/uts/common/io/i40e/i40e_stats.c
+++ new/usr/src/uts/common/io/i40e/i40e_stats.c
1 1 /*
2 2 * This file and its contents are supplied under the terms of the
3 3 * Common Development and Distribution License ("CDDL"), version 1.0.
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4 4 * You may only use this file in accordance with the terms of version
5 5 * 1.0 of the CDDL.
6 6 *
7 7 * A full copy of the text of the CDDL should have accompanied this
8 8 * source. A copy of the CDDL is also available via the Internet at
9 9 * http://www.illumos.org/license/CDDL.
10 10 */
11 11
12 12 /*
13 13 * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved.
14 - * Copyright 2016 Joyent, Inc.
14 + * Copyright 2019 Joyent, Inc.
15 15 */
16 16
17 17 #include "i40e_sw.h"
18 18
19 19 /*
20 20 * -------------------
21 21 * Statistics Overview
22 22 * -------------------
23 23 *
24 24 * As part of managing the driver and understanding what's going on, we keep
25 25 * track of statistics from two different sources:
26 26 *
27 27 * - Statistics from the device
28 28 * - Statistics maintained by the driver
29 29 *
30 30 * Generally, the hardware provides us traditional IETF and MIB Ethernet
31 31 * statistics, for example, the total packets in and out, various errors in
32 32 * packets, the negotiated status etc. The driver, on the other hand, primarily
33 33 * contains statistics around driver-specific issues, such as information about
34 34 * checksumming on receive and transmit and the data in and out of a specific
35 35 * ring.
36 36 *
37 37 * We export statistics in two different forms. The first form is the required
38 38 * GLDv3 endpoints, specifically:
39 39 *
40 40 * - The general GLDv3 mc_getstat interface
41 41 * - The GLDv3 ring mri_stat interface
42 42 *
43 43 * The second form that we export statistics is through kstats. kstats are
44 44 * exported in different ways. Particularly we arrange the kstats to monitor the
45 45 * layout of the device. Currently we have kstats which capture both the IEEE
46 46 * and driver-implementation specific stats. There are kstats for each of the
47 47 * following structures:
48 48 *
49 49 * - Each physical function
50 50 * - Each VSI
51 51 * - Each Queue
52 52 *
53 53 * The PF's kstat is called 'pfstats' so as not to collide with other system
54 54 * provided kstats. Thus, for instance 0, usually the first PF, the full kstat
55 55 * would be: i40e:0:pfstats:.
56 56 *
57 57 * The kstat for each VSI is called vsi_%instance. So for the first PF, which is
58 58 * instance zero and the first vsi, which has id 0, it will be named vsi_0 and
59 59 * the full kstat would be i40e:0:vsi_0:.
60 60 *
61 61 * The kstat for each queue is trqpair_tx_%queue and trqpair_rx_%queue. Note
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62 62 * that these are labeled based on their local index, which may mean that
63 63 * different instances have overlapping sets of queues. This isn't a problem as
64 64 * the kstats will always use the instance number of the pf to distinguish it in
65 65 * the kstat tuple.
66 66 *
67 67 * ---------------------
68 68 * Hardware Arrangements
69 69 * ---------------------
70 70 *
71 71 * The hardware keeps statistics at each physical function/MAC (PF) and it keeps
72 - * statistics on each virtual station interface (VSI). Currently we only use one
73 - * VSI per PF (see the i40e_main.c theory statement). The hardware has a limited
74 - * number of statistics units available. While every PF is guaranteed to have a
75 - * statistics unit, it is possible that we will run out for a given VSI. We'll
76 - * have to figure out an appropriate strategy here when we end up supporting
77 - * multiple VSIs.
72 + * statistics on each virtual station interface (VSI).
78 73 *
79 74 * The hardware keeps these statistics as 32-bit and 48-bit counters. We are
80 75 * required to read them and then compute the differences between them. The
81 76 * 48-bit counters span more than one 32-bit register in the BAR. The hardware
82 77 * suggests that to read them, we perform 64-bit reads of the lower of the two
83 78 * registers that make up a 48-bit stat. The hardware guarantees that the reads
84 79 * of those two registers will be atomic and we'll get a consistent value, not a
85 80 * property it has for every read of two registers.
86 81 *
87 82 * For every kstat we have based on this, we have a corresponding uint64_t that
88 83 * we keep around as a base value in a separate structure. Whenever we read a
89 84 * value, we end up grabbing the current value, calculating a difference between
90 85 * the previously stored value and the current one, and updating the kstat with
91 86 * that difference. After which, we go through and update the base value that we
92 87 * stored. This is all encapsulated in i40e_stat_get_uint32() and
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93 88 * i40e_stat_get_uint48().
94 89 *
95 90 * The only unfortunate thing here is that the hardware doesn't give us any kind
96 91 * of overflow counter. It just tries to make sure that the uint32_t and
97 92 * uint48_t counters are large enough to hopefully not overflow right away. This
98 93 * isn't the most reassuring statement and we should investigate ways of
99 94 * ensuring that if a system is active, but not actively measured, we don't lose
100 95 * data.
101 96 *
102 97 * The pf kstats data is stored in the i40e_t`i40e_pf_kstat. It is backed by the
103 - * i40e_t`i40e_pf_stat structure. Similarly the VSI related kstat is in
104 - * i40e_t`i40e_vsi_kstat and the data is backed in the i40e_t`i40e_vsi_stat. All
105 - * of this data is protected by the i40e_stat_lock, which should be taken last,
106 - * when acquiring locks.
98 + * i40e_t`i40e_pf_stat structure. Similarly the VSI related kstats are in
99 + * i40e_t`i40e_vsis[idx].iv_kstats and the data is backed in the
100 + * i40e_t`i40e_vsis[idx].iv_stats. All of this data is protected by the
101 + * i40e_stat_lock, which should be taken last, when acquiring locks.
107 102 */
108 103
109 104 static void
110 105 i40e_stat_get_uint48(i40e_t *i40e, uintptr_t reg, kstat_named_t *kstat,
111 106 uint64_t *base, boolean_t init)
112 107 {
113 108 i40e_hw_t *hw = &i40e->i40e_hw_space;
114 109 uint64_t raw, delta;
115 110
116 111 ASSERT(MUTEX_HELD(&i40e->i40e_stat_lock));
117 112
118 113 raw = ddi_get64(i40e->i40e_osdep_space.ios_reg_handle,
119 114 (uint64_t *)((uintptr_t)hw->hw_addr + reg));
120 115
121 116 if (init == B_TRUE) {
122 117 *base = raw;
123 118 return;
124 119 }
125 120
126 121 /*
127 122 * Check for wraparound, note that the counter is actually only 48-bits,
128 123 * even though it has two uint32_t regs present.
129 124 */
130 125 if (raw >= *base) {
131 126 delta = raw - *base;
132 127 } else {
133 128 delta = 0x1000000000000ULL - *base + raw;
134 129 }
135 130
136 131 kstat->value.ui64 += delta;
137 132 *base = raw;
138 133 }
139 134
140 135 static void
141 136 i40e_stat_get_uint32(i40e_t *i40e, uintptr_t reg, kstat_named_t *kstat,
142 137 uint64_t *base, boolean_t init)
143 138 {
144 139 i40e_hw_t *hw = &i40e->i40e_hw_space;
145 140 uint64_t raw, delta;
146 141
147 142 ASSERT(MUTEX_HELD(&i40e->i40e_stat_lock));
148 143
149 144 raw = ddi_get32(i40e->i40e_osdep_space.ios_reg_handle,
150 145 (uint32_t *)((uintptr_t)hw->hw_addr + reg));
151 146
152 147 if (init == B_TRUE) {
153 148 *base = raw;
154 149 return;
155 150 }
156 151
157 152 /*
158 153 * Watch out for wraparound as we only have a 32-bit counter.
159 154 */
160 155 if (raw >= *base) {
161 156 delta = raw - *base;
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162 157 } else {
163 158 delta = 0x100000000ULL - *base + raw;
164 159 }
165 160
166 161 kstat->value.ui64 += delta;
167 162 *base = raw;
168 163
169 164 }
170 165
171 166 static void
172 -i40e_stat_vsi_update(i40e_t *i40e, boolean_t init)
167 +i40e_stat_vsi_update(i40e_t *i40e, uint_t idx, boolean_t init)
173 168 {
174 169 i40e_vsi_stats_t *ivs;
175 170 i40e_vsi_kstats_t *ivk;
176 - int id = i40e->i40e_vsi_stat_id;
171 + uint16_t id = i40e->i40e_vsis[idx].iv_stats_id;
177 172
178 - ASSERT(i40e->i40e_vsi_kstat != NULL);
179 - ivs = &i40e->i40e_vsi_stat;
180 - ivk = i40e->i40e_vsi_kstat->ks_data;
173 + ASSERT3P(i40e->i40e_vsis[idx].iv_kstats, !=, NULL);
174 + ivs = &i40e->i40e_vsis[idx].iv_stats;
175 + ivk = i40e->i40e_vsis[idx].iv_kstats->ks_data;
181 176
182 177 mutex_enter(&i40e->i40e_stat_lock);
183 178
184 179 i40e_stat_get_uint48(i40e, I40E_GLV_GORCL(id), &ivk->ivk_rx_bytes,
185 180 &ivs->ivs_rx_bytes, init);
186 181 i40e_stat_get_uint48(i40e, I40E_GLV_UPRCL(id), &ivk->ivk_rx_unicast,
187 182 &ivs->ivs_rx_unicast, init);
188 183 i40e_stat_get_uint48(i40e, I40E_GLV_MPRCL(id), &ivk->ivk_rx_multicast,
189 184 &ivs->ivs_rx_multicast, init);
190 185 i40e_stat_get_uint48(i40e, I40E_GLV_BPRCL(id), &ivk->ivk_rx_broadcast,
191 186 &ivs->ivs_rx_broadcast, init);
192 187
193 188 i40e_stat_get_uint32(i40e, I40E_GLV_RDPC(id), &ivk->ivk_rx_discards,
194 189 &ivs->ivs_rx_discards, init);
195 190 i40e_stat_get_uint32(i40e, I40E_GLV_RUPP(id),
196 191 &ivk->ivk_rx_unknown_protocol,
197 192 &ivs->ivs_rx_unknown_protocol,
198 193 init);
199 194
200 195 i40e_stat_get_uint48(i40e, I40E_GLV_GOTCL(id), &ivk->ivk_tx_bytes,
201 196 &ivs->ivs_tx_bytes, init);
202 197 i40e_stat_get_uint48(i40e, I40E_GLV_UPTCL(id), &ivk->ivk_tx_unicast,
203 198 &ivs->ivs_tx_unicast, init);
204 199 i40e_stat_get_uint48(i40e, I40E_GLV_MPTCL(id), &ivk->ivk_tx_multicast,
205 200 &ivs->ivs_tx_multicast, init);
206 201 i40e_stat_get_uint48(i40e, I40E_GLV_BPTCL(id), &ivk->ivk_tx_broadcast,
207 202 &ivs->ivs_tx_broadcast, init);
208 203
209 204 i40e_stat_get_uint32(i40e, I40E_GLV_TEPC(id), &ivk->ivk_tx_errors,
210 205 &ivs->ivs_tx_errors, init);
211 206
212 207 mutex_exit(&i40e->i40e_stat_lock);
213 208
214 209 /*
215 210 * We follow ixgbe's lead here and that if a kstat update didn't work
216 211 * 100% then we mark service unaffected as opposed to when fetching
217 212 * things for MAC directly.
218 213 */
219 214 if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_reg_handle) !=
220 215 DDI_FM_OK) {
221 216 ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_UNAFFECTED);
222 217 }
223 218 }
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224 219
225 220 static int
226 221 i40e_stat_vsi_kstat_update(kstat_t *ksp, int rw)
227 222 {
228 223 i40e_t *i40e;
229 224
230 225 if (rw == KSTAT_WRITE)
231 226 return (EACCES);
232 227
233 228 i40e = ksp->ks_private;
234 - i40e_stat_vsi_update(i40e, B_FALSE);
229 + for (uint_t i = 0; i < i40e->i40e_num_rx_groups; i++)
230 + i40e_stat_vsi_update(i40e, i, B_FALSE);
231 +
235 232 return (0);
236 233 }
237 234
238 235 void
239 -i40e_stat_vsi_fini(i40e_t *i40e)
236 +i40e_stat_vsi_fini(i40e_t *i40e, uint_t idx)
240 237 {
241 - if (i40e->i40e_vsi_kstat != NULL) {
242 - kstat_delete(i40e->i40e_vsi_kstat);
243 - i40e->i40e_vsi_kstat = NULL;
238 + if (i40e->i40e_vsis[idx].iv_kstats != NULL) {
239 + kstat_delete(i40e->i40e_vsis[idx].iv_kstats);
240 + i40e->i40e_vsis[idx].iv_kstats = NULL;
244 241 }
245 242 }
246 243
247 244 boolean_t
248 -i40e_stat_vsi_init(i40e_t *i40e)
245 +i40e_stat_vsi_init(i40e_t *i40e, uint_t idx)
249 246 {
250 247 kstat_t *ksp;
251 248 i40e_vsi_kstats_t *ivk;
252 249 char buf[64];
250 + uint16_t vsi_id = i40e->i40e_vsis[idx].iv_seid;
253 251
254 - (void) snprintf(buf, sizeof (buf), "vsi_%d", i40e->i40e_vsi_id);
252 + (void) snprintf(buf, sizeof (buf), "vsi_%u", vsi_id);
255 253
256 254 ksp = kstat_create(I40E_MODULE_NAME, ddi_get_instance(i40e->i40e_dip),
257 255 buf, "net", KSTAT_TYPE_NAMED,
258 256 sizeof (i40e_vsi_kstats_t) / sizeof (kstat_named_t), 0);
259 257
260 258 if (ksp == NULL) {
261 - i40e_error(i40e, "Failed to create kstats for VSI %d",
262 - i40e->i40e_vsi_id);
259 + i40e_error(i40e, "Failed to create kstats for VSI %u", vsi_id);
263 260 return (B_FALSE);
264 261 }
265 262
266 - i40e->i40e_vsi_kstat = ksp;
263 + i40e->i40e_vsis[idx].iv_kstats = ksp;
267 264 ivk = ksp->ks_data;
268 265 ksp->ks_update = i40e_stat_vsi_kstat_update;
269 266 ksp->ks_private = i40e;
270 267
271 268 kstat_named_init(&ivk->ivk_rx_bytes, "rx_bytes",
272 269 KSTAT_DATA_UINT64);
273 270 kstat_named_init(&ivk->ivk_rx_unicast, "rx_unicast",
274 271 KSTAT_DATA_UINT64);
275 272 kstat_named_init(&ivk->ivk_rx_multicast, "rx_multicast",
276 273 KSTAT_DATA_UINT64);
277 274 kstat_named_init(&ivk->ivk_rx_broadcast, "rx_broadcast",
278 275 KSTAT_DATA_UINT64);
279 276 kstat_named_init(&ivk->ivk_rx_discards, "rx_discards",
280 277 KSTAT_DATA_UINT64);
281 278 kstat_named_init(&ivk->ivk_rx_unknown_protocol, "rx_unknown_protocol",
282 279 KSTAT_DATA_UINT64);
283 280 kstat_named_init(&ivk->ivk_tx_bytes, "tx_bytes",
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284 281 KSTAT_DATA_UINT64);
285 282 kstat_named_init(&ivk->ivk_tx_unicast, "tx_unicast",
286 283 KSTAT_DATA_UINT64);
287 284 kstat_named_init(&ivk->ivk_tx_multicast, "tx_multicast",
288 285 KSTAT_DATA_UINT64);
289 286 kstat_named_init(&ivk->ivk_tx_broadcast, "tx_broadcast",
290 287 KSTAT_DATA_UINT64);
291 288 kstat_named_init(&ivk->ivk_tx_errors, "tx_errors",
292 289 KSTAT_DATA_UINT64);
293 290
294 - bzero(&i40e->i40e_vsi_stat, sizeof (i40e_vsi_stats_t));
295 - i40e_stat_vsi_update(i40e, B_TRUE);
296 - kstat_install(i40e->i40e_vsi_kstat);
291 + bzero(&i40e->i40e_vsis[idx].iv_stats, sizeof (i40e_vsi_stats_t));
292 + i40e_stat_vsi_update(i40e, idx, B_TRUE);
293 + kstat_install(i40e->i40e_vsis[idx].iv_kstats);
297 294
298 295 return (B_TRUE);
299 296 }
300 297
301 298 static void
302 299 i40e_stat_pf_update(i40e_t *i40e, boolean_t init)
303 300 {
304 301 i40e_pf_stats_t *ips;
305 302 i40e_pf_kstats_t *ipk;
306 303 int port = i40e->i40e_hw_space.port;
307 304 int i;
308 305
309 306 ASSERT(i40e->i40e_pf_kstat != NULL);
310 307 ips = &i40e->i40e_pf_stat;
311 308 ipk = i40e->i40e_pf_kstat->ks_data;
312 309
313 310 mutex_enter(&i40e->i40e_stat_lock);
314 311
315 312 /* 64-bit PCIe regs */
316 313 i40e_stat_get_uint48(i40e, I40E_GLPRT_GORCL(port),
317 314 &ipk->ipk_rx_bytes, &ips->ips_rx_bytes, init);
318 315 i40e_stat_get_uint48(i40e, I40E_GLPRT_UPRCL(port),
319 316 &ipk->ipk_rx_unicast, &ips->ips_rx_unicast, init);
320 317 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPRCL(port),
321 318 &ipk->ipk_rx_multicast, &ips->ips_rx_multicast, init);
322 319 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPRCL(port),
323 320 &ipk->ipk_rx_broadcast, &ips->ips_rx_broadcast, init);
324 321 i40e_stat_get_uint48(i40e, I40E_GLPRT_GOTCL(port),
325 322 &ipk->ipk_tx_bytes, &ips->ips_tx_bytes, init);
326 323 i40e_stat_get_uint48(i40e, I40E_GLPRT_UPTCL(port),
327 324 &ipk->ipk_tx_unicast, &ips->ips_tx_unicast, init);
328 325 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPTCL(port),
329 326 &ipk->ipk_tx_multicast, &ips->ips_tx_multicast, init);
330 327 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPTCL(port),
331 328 &ipk->ipk_tx_broadcast, &ips->ips_tx_broadcast, init);
332 329
333 330 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC64L(port),
334 331 &ipk->ipk_rx_size_64, &ips->ips_rx_size_64, init);
335 332 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC127L(port),
336 333 &ipk->ipk_rx_size_127, &ips->ips_rx_size_127, init);
337 334 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC255L(port),
338 335 &ipk->ipk_rx_size_255, &ips->ips_rx_size_255, init);
339 336 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC511L(port),
340 337 &ipk->ipk_rx_size_511, &ips->ips_rx_size_511, init);
341 338 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC1023L(port),
342 339 &ipk->ipk_rx_size_1023, &ips->ips_rx_size_1023, init);
343 340 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC1522L(port),
344 341 &ipk->ipk_rx_size_1522, &ips->ips_rx_size_1522, init);
345 342 i40e_stat_get_uint48(i40e, I40E_GLPRT_PRC9522L(port),
346 343 &ipk->ipk_rx_size_9522, &ips->ips_rx_size_9522, init);
347 344
348 345 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC64L(port),
349 346 &ipk->ipk_tx_size_64, &ips->ips_tx_size_64, init);
350 347 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC127L(port),
351 348 &ipk->ipk_tx_size_127, &ips->ips_tx_size_127, init);
352 349 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC255L(port),
353 350 &ipk->ipk_tx_size_255, &ips->ips_tx_size_255, init);
354 351 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC511L(port),
355 352 &ipk->ipk_tx_size_511, &ips->ips_tx_size_511, init);
356 353 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC1023L(port),
357 354 &ipk->ipk_tx_size_1023, &ips->ips_tx_size_1023, init);
358 355 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC1522L(port),
359 356 &ipk->ipk_tx_size_1522, &ips->ips_tx_size_1522, init);
360 357 i40e_stat_get_uint48(i40e, I40E_GLPRT_PTC9522L(port),
361 358 &ipk->ipk_tx_size_9522, &ips->ips_tx_size_9522, init);
362 359
363 360 /* 32-bit PCIe regs */
364 361 i40e_stat_get_uint32(i40e, I40E_GLPRT_LXONRXC(port),
365 362 &ipk->ipk_link_xon_rx, &ips->ips_link_xon_rx, init);
366 363 i40e_stat_get_uint32(i40e, I40E_GLPRT_LXOFFRXC(port),
367 364 &ipk->ipk_link_xoff_rx, &ips->ips_link_xoff_rx, init);
368 365 i40e_stat_get_uint32(i40e, I40E_GLPRT_LXONTXC(port),
369 366 &ipk->ipk_link_xon_tx, &ips->ips_link_xon_tx, init);
370 367 i40e_stat_get_uint32(i40e, I40E_GLPRT_LXOFFTXC(port),
371 368 &ipk->ipk_link_xoff_tx, &ips->ips_link_xoff_tx, init);
372 369
373 370 for (i = 0; i < 8; i++) {
374 371 i40e_stat_get_uint32(i40e, I40E_GLPRT_PXONRXC(port, i),
375 372 &ipk->ipk_priority_xon_rx[i], &ips->ips_priority_xon_rx[i],
376 373 init);
377 374 i40e_stat_get_uint32(i40e, I40E_GLPRT_PXOFFRXC(port, i),
378 375 &ipk->ipk_priority_xoff_rx[i],
379 376 &ips->ips_priority_xoff_rx[i],
380 377 init);
381 378 i40e_stat_get_uint32(i40e, I40E_GLPRT_PXONTXC(port, i),
382 379 &ipk->ipk_priority_xon_tx[i], &ips->ips_priority_xon_tx[i],
383 380 init);
384 381 i40e_stat_get_uint32(i40e, I40E_GLPRT_PXOFFTXC(port, i),
385 382 &ipk->ipk_priority_xoff_tx[i],
386 383 &ips->ips_priority_xoff_tx[i],
387 384 init);
388 385 i40e_stat_get_uint32(i40e, I40E_GLPRT_RXON2OFFCNT(port, i),
389 386 &ipk->ipk_priority_xon_2_xoff[i],
390 387 &ips->ips_priority_xon_2_xoff[i],
391 388 init);
392 389 }
393 390
394 391 i40e_stat_get_uint32(i40e, I40E_GLPRT_CRCERRS(port),
395 392 &ipk->ipk_crc_errors, &ips->ips_crc_errors, init);
396 393 i40e_stat_get_uint32(i40e, I40E_GLPRT_ILLERRC(port),
397 394 &ipk->ipk_illegal_bytes, &ips->ips_illegal_bytes, init);
398 395 i40e_stat_get_uint32(i40e, I40E_GLPRT_MLFC(port),
399 396 &ipk->ipk_mac_local_faults, &ips->ips_mac_local_faults, init);
400 397 i40e_stat_get_uint32(i40e, I40E_GLPRT_MRFC(port),
401 398 &ipk->ipk_mac_remote_faults, &ips->ips_mac_remote_faults, init);
402 399 i40e_stat_get_uint32(i40e, I40E_GLPRT_RLEC(port),
403 400 &ipk->ipk_rx_length_errors, &ips->ips_rx_length_errors, init);
404 401 i40e_stat_get_uint32(i40e, I40E_GLPRT_RUC(port),
405 402 &ipk->ipk_rx_undersize, &ips->ips_rx_undersize, init);
406 403 i40e_stat_get_uint32(i40e, I40E_GLPRT_RFC(port),
407 404 &ipk->ipk_rx_fragments, &ips->ips_rx_fragments, init);
408 405 i40e_stat_get_uint32(i40e, I40E_GLPRT_ROC(port),
409 406 &ipk->ipk_rx_oversize, &ips->ips_rx_oversize, init);
410 407 i40e_stat_get_uint32(i40e, I40E_GLPRT_RJC(port),
411 408 &ipk->ipk_rx_jabber, &ips->ips_rx_jabber, init);
412 409 i40e_stat_get_uint32(i40e, I40E_GLPRT_RDPC(port),
413 410 &ipk->ipk_rx_discards, &ips->ips_rx_discards, init);
414 411 i40e_stat_get_uint32(i40e, I40E_GLPRT_LDPC(port),
415 412 &ipk->ipk_rx_vm_discards, &ips->ips_rx_vm_discards, init);
416 413 i40e_stat_get_uint32(i40e, I40E_GLPRT_MSPDC(port),
417 414 &ipk->ipk_rx_short_discards, &ips->ips_rx_short_discards, init);
418 415 i40e_stat_get_uint32(i40e, I40E_GLPRT_TDOLD(port),
419 416 &ipk->ipk_tx_dropped_link_down, &ips->ips_tx_dropped_link_down,
420 417 init);
421 418 i40e_stat_get_uint32(i40e, I40E_GLPRT_RUPP(port),
422 419 &ipk->ipk_rx_unknown_protocol, &ips->ips_rx_unknown_protocol, init);
423 420
424 421 /* 64-bit */
425 422 i40e_stat_get_uint48(i40e, I40E_GL_RXERR1_L(port), &ipk->ipk_rx_err1,
426 423 &ips->ips_rx_err1, init);
427 424 i40e_stat_get_uint48(i40e, I40E_GL_RXERR2_L(port), &ipk->ipk_rx_err2,
428 425 &ips->ips_rx_err2, init);
429 426
430 427 mutex_exit(&i40e->i40e_stat_lock);
431 428
432 429 /*
433 430 * We follow ixgbe's lead here and that if a kstat update didn't work
434 431 * 100% then we mark service unaffected as opposed to when fetching
435 432 * things for MAC directly.
436 433 */
437 434 if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_reg_handle) !=
438 435 DDI_FM_OK) {
439 436 ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_UNAFFECTED);
440 437 }
441 438 }
442 439
443 440 static int
444 441 i40e_stat_pf_kstat_update(kstat_t *ksp, int rw)
445 442 {
446 443 i40e_t *i40e;
447 444
448 445 if (rw == KSTAT_WRITE)
449 446 return (EACCES);
450 447
451 448 i40e = ksp->ks_private;
452 449 i40e_stat_pf_update(i40e, B_FALSE);
453 450 return (0);
454 451 }
455 452
456 453
457 454 static boolean_t
458 455 i40e_stat_pf_init(i40e_t *i40e)
459 456 {
460 457 kstat_t *ksp;
461 458 i40e_pf_kstats_t *ipk;
462 459
463 460 ksp = kstat_create(I40E_MODULE_NAME, ddi_get_instance(i40e->i40e_dip),
464 461 "pfstats", "net", KSTAT_TYPE_NAMED,
465 462 sizeof (i40e_pf_kstats_t) / sizeof (kstat_named_t), 0);
466 463 if (ksp == NULL) {
467 464 i40e_error(i40e, "Could not create kernel statistics.");
468 465 return (B_FALSE);
469 466 }
470 467
471 468 i40e->i40e_pf_kstat = ksp;
472 469 ipk = ksp->ks_data;
473 470 ksp->ks_update = i40e_stat_pf_kstat_update;
474 471 ksp->ks_private = i40e;
475 472
476 473 kstat_named_init(&ipk->ipk_rx_bytes, "rx_bytes",
477 474 KSTAT_DATA_UINT64);
478 475 kstat_named_init(&ipk->ipk_rx_unicast, "rx_unicast",
479 476 KSTAT_DATA_UINT64);
480 477 kstat_named_init(&ipk->ipk_rx_multicast, "rx_multicast",
481 478 KSTAT_DATA_UINT64);
482 479 kstat_named_init(&ipk->ipk_rx_broadcast, "rx_broadcast",
483 480 KSTAT_DATA_UINT64);
484 481 kstat_named_init(&ipk->ipk_tx_bytes, "tx_bytes",
485 482 KSTAT_DATA_UINT64);
486 483 kstat_named_init(&ipk->ipk_tx_unicast, "tx_unicast",
487 484 KSTAT_DATA_UINT64);
488 485 kstat_named_init(&ipk->ipk_tx_multicast, "tx_multicast",
489 486 KSTAT_DATA_UINT64);
490 487 kstat_named_init(&ipk->ipk_tx_broadcast, "tx_broadcast",
491 488 KSTAT_DATA_UINT64);
492 489
493 490 kstat_named_init(&ipk->ipk_rx_size_64, "rx_size_64",
494 491 KSTAT_DATA_UINT64);
495 492 kstat_named_init(&ipk->ipk_rx_size_127, "rx_size_127",
496 493 KSTAT_DATA_UINT64);
497 494 kstat_named_init(&ipk->ipk_rx_size_255, "rx_size_255",
498 495 KSTAT_DATA_UINT64);
499 496 kstat_named_init(&ipk->ipk_rx_size_511, "rx_size_511",
500 497 KSTAT_DATA_UINT64);
501 498 kstat_named_init(&ipk->ipk_rx_size_1023, "rx_size_1023",
502 499 KSTAT_DATA_UINT64);
503 500 kstat_named_init(&ipk->ipk_rx_size_1522, "rx_size_1522",
504 501 KSTAT_DATA_UINT64);
505 502 kstat_named_init(&ipk->ipk_rx_size_9522, "rx_size_9522",
506 503 KSTAT_DATA_UINT64);
507 504
508 505 kstat_named_init(&ipk->ipk_tx_size_64, "tx_size_64",
509 506 KSTAT_DATA_UINT64);
510 507 kstat_named_init(&ipk->ipk_tx_size_127, "tx_size_127",
511 508 KSTAT_DATA_UINT64);
512 509 kstat_named_init(&ipk->ipk_tx_size_255, "tx_size_255",
513 510 KSTAT_DATA_UINT64);
514 511 kstat_named_init(&ipk->ipk_tx_size_511, "tx_size_511",
515 512 KSTAT_DATA_UINT64);
516 513 kstat_named_init(&ipk->ipk_tx_size_1023, "tx_size_1023",
517 514 KSTAT_DATA_UINT64);
518 515 kstat_named_init(&ipk->ipk_tx_size_1522, "tx_size_1522",
519 516 KSTAT_DATA_UINT64);
520 517 kstat_named_init(&ipk->ipk_tx_size_9522, "tx_size_9522",
521 518 KSTAT_DATA_UINT64);
522 519
523 520 kstat_named_init(&ipk->ipk_link_xon_rx, "link_xon_rx",
524 521 KSTAT_DATA_UINT64);
525 522 kstat_named_init(&ipk->ipk_link_xoff_rx, "link_xoff_rx",
526 523 KSTAT_DATA_UINT64);
527 524 kstat_named_init(&ipk->ipk_link_xon_tx, "link_xon_tx",
528 525 KSTAT_DATA_UINT64);
529 526 kstat_named_init(&ipk->ipk_link_xoff_tx, "link_xoff_tx",
530 527 KSTAT_DATA_UINT64);
531 528
532 529 kstat_named_init(&ipk->ipk_priority_xon_rx[0], "priority_xon_rx[0]",
533 530 KSTAT_DATA_UINT64);
534 531 kstat_named_init(&ipk->ipk_priority_xoff_rx[0], "priority_xoff_rx[0]",
535 532 KSTAT_DATA_UINT64);
536 533 kstat_named_init(&ipk->ipk_priority_xon_tx[0], "priority_xon_tx[0]",
537 534 KSTAT_DATA_UINT64);
538 535 kstat_named_init(&ipk->ipk_priority_xoff_tx[0], "priority_xoff_tx[0]",
539 536 KSTAT_DATA_UINT64);
540 537 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[0],
541 538 "priority_xon_2_xoff[0]",
542 539 KSTAT_DATA_UINT64);
543 540
544 541 kstat_named_init(&ipk->ipk_priority_xon_rx[1], "priority_xon_rx[1]",
545 542 KSTAT_DATA_UINT64);
546 543 kstat_named_init(&ipk->ipk_priority_xoff_rx[1], "priority_xoff_rx[1]",
547 544 KSTAT_DATA_UINT64);
548 545 kstat_named_init(&ipk->ipk_priority_xon_tx[1], "priority_xon_tx[1]",
549 546 KSTAT_DATA_UINT64);
550 547 kstat_named_init(&ipk->ipk_priority_xoff_tx[1], "priority_xoff_tx[1]",
551 548 KSTAT_DATA_UINT64);
552 549 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[1],
553 550 "priority_xon_2_xoff[1]",
554 551 KSTAT_DATA_UINT64);
555 552
556 553 kstat_named_init(&ipk->ipk_priority_xon_rx[2], "priority_xon_rx[2]",
557 554 KSTAT_DATA_UINT64);
558 555 kstat_named_init(&ipk->ipk_priority_xoff_rx[2], "priority_xoff_rx[2]",
559 556 KSTAT_DATA_UINT64);
560 557 kstat_named_init(&ipk->ipk_priority_xon_tx[2], "priority_xon_tx[2]",
561 558 KSTAT_DATA_UINT64);
562 559 kstat_named_init(&ipk->ipk_priority_xoff_tx[2], "priority_xoff_tx[2]",
563 560 KSTAT_DATA_UINT64);
564 561 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[2],
565 562 "priority_xon_2_xoff[2]",
566 563 KSTAT_DATA_UINT64);
567 564
568 565 kstat_named_init(&ipk->ipk_priority_xon_rx[3], "priority_xon_rx[3]",
569 566 KSTAT_DATA_UINT64);
570 567 kstat_named_init(&ipk->ipk_priority_xoff_rx[3], "priority_xoff_rx[3]",
571 568 KSTAT_DATA_UINT64);
572 569 kstat_named_init(&ipk->ipk_priority_xon_tx[3], "priority_xon_tx[3]",
573 570 KSTAT_DATA_UINT64);
574 571 kstat_named_init(&ipk->ipk_priority_xoff_tx[3], "priority_xoff_tx[3]",
575 572 KSTAT_DATA_UINT64);
576 573 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[3],
577 574 "priority_xon_2_xoff[3]",
578 575 KSTAT_DATA_UINT64);
579 576
580 577 kstat_named_init(&ipk->ipk_priority_xon_rx[4], "priority_xon_rx[4]",
581 578 KSTAT_DATA_UINT64);
582 579 kstat_named_init(&ipk->ipk_priority_xoff_rx[4], "priority_xoff_rx[4]",
583 580 KSTAT_DATA_UINT64);
584 581 kstat_named_init(&ipk->ipk_priority_xon_tx[4], "priority_xon_tx[4]",
585 582 KSTAT_DATA_UINT64);
586 583 kstat_named_init(&ipk->ipk_priority_xoff_tx[4], "priority_xoff_tx[4]",
587 584 KSTAT_DATA_UINT64);
588 585 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[4],
589 586 "priority_xon_2_xoff[4]",
590 587 KSTAT_DATA_UINT64);
591 588
592 589 kstat_named_init(&ipk->ipk_priority_xon_rx[5], "priority_xon_rx[5]",
593 590 KSTAT_DATA_UINT64);
594 591 kstat_named_init(&ipk->ipk_priority_xoff_rx[5], "priority_xoff_rx[5]",
595 592 KSTAT_DATA_UINT64);
596 593 kstat_named_init(&ipk->ipk_priority_xon_tx[5], "priority_xon_tx[5]",
597 594 KSTAT_DATA_UINT64);
598 595 kstat_named_init(&ipk->ipk_priority_xoff_tx[5], "priority_xoff_tx[5]",
599 596 KSTAT_DATA_UINT64);
600 597 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[5],
601 598 "priority_xon_2_xoff[5]",
602 599 KSTAT_DATA_UINT64);
603 600
604 601 kstat_named_init(&ipk->ipk_priority_xon_rx[6], "priority_xon_rx[6]",
605 602 KSTAT_DATA_UINT64);
606 603 kstat_named_init(&ipk->ipk_priority_xoff_rx[6], "priority_xoff_rx[6]",
607 604 KSTAT_DATA_UINT64);
608 605 kstat_named_init(&ipk->ipk_priority_xon_tx[6], "priority_xon_tx[6]",
609 606 KSTAT_DATA_UINT64);
610 607 kstat_named_init(&ipk->ipk_priority_xoff_tx[6], "priority_xoff_tx[6]",
611 608 KSTAT_DATA_UINT64);
612 609 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[6],
613 610 "priority_xon_2_xoff[6]",
614 611 KSTAT_DATA_UINT64);
615 612
616 613 kstat_named_init(&ipk->ipk_priority_xon_rx[7], "priority_xon_rx[7]",
617 614 KSTAT_DATA_UINT64);
618 615 kstat_named_init(&ipk->ipk_priority_xoff_rx[7], "priority_xoff_rx[7]",
619 616 KSTAT_DATA_UINT64);
620 617 kstat_named_init(&ipk->ipk_priority_xon_tx[7], "priority_xon_tx[7]",
621 618 KSTAT_DATA_UINT64);
622 619 kstat_named_init(&ipk->ipk_priority_xoff_tx[7], "priority_xoff_tx[7]",
623 620 KSTAT_DATA_UINT64);
624 621 kstat_named_init(&ipk->ipk_priority_xon_2_xoff[7],
625 622 "priority_xon_2_xoff[7]",
626 623 KSTAT_DATA_UINT64);
627 624
628 625 kstat_named_init(&ipk->ipk_crc_errors, "crc_errors",
629 626 KSTAT_DATA_UINT64);
630 627 kstat_named_init(&ipk->ipk_illegal_bytes, "illegal_bytes",
631 628 KSTAT_DATA_UINT64);
632 629 kstat_named_init(&ipk->ipk_mac_local_faults, "mac_local_faults",
633 630 KSTAT_DATA_UINT64);
634 631 kstat_named_init(&ipk->ipk_mac_remote_faults, "mac_remote_faults",
635 632 KSTAT_DATA_UINT64);
636 633 kstat_named_init(&ipk->ipk_rx_length_errors, "rx_length_errors",
637 634 KSTAT_DATA_UINT64);
638 635 kstat_named_init(&ipk->ipk_rx_undersize, "rx_undersize",
639 636 KSTAT_DATA_UINT64);
640 637 kstat_named_init(&ipk->ipk_rx_fragments, "rx_fragments",
641 638 KSTAT_DATA_UINT64);
642 639 kstat_named_init(&ipk->ipk_rx_oversize, "rx_oversize",
643 640 KSTAT_DATA_UINT64);
644 641 kstat_named_init(&ipk->ipk_rx_jabber, "rx_jabber",
645 642 KSTAT_DATA_UINT64);
646 643 kstat_named_init(&ipk->ipk_rx_discards, "rx_discards",
647 644 KSTAT_DATA_UINT64);
648 645 kstat_named_init(&ipk->ipk_rx_vm_discards, "rx_vm_discards",
649 646 KSTAT_DATA_UINT64);
650 647 kstat_named_init(&ipk->ipk_rx_short_discards, "rx_short_discards",
651 648 KSTAT_DATA_UINT64);
652 649 kstat_named_init(&ipk->ipk_tx_dropped_link_down, "tx_dropped_link_down",
653 650 KSTAT_DATA_UINT64);
654 651 kstat_named_init(&ipk->ipk_rx_unknown_protocol, "rx_unknown_protocol",
655 652 KSTAT_DATA_UINT64);
656 653 kstat_named_init(&ipk->ipk_rx_err1, "rx_err1",
657 654 KSTAT_DATA_UINT64);
658 655 kstat_named_init(&ipk->ipk_rx_err2, "rx_err2",
659 656 KSTAT_DATA_UINT64);
660 657
661 658
662 659 bzero(&i40e->i40e_pf_stat, sizeof (i40e_pf_stats_t));
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663 660 i40e_stat_pf_update(i40e, B_TRUE);
664 661
665 662 kstat_install(i40e->i40e_pf_kstat);
666 663
667 664 return (B_TRUE);
668 665 }
669 666
670 667 void
671 668 i40e_stats_fini(i40e_t *i40e)
672 669 {
673 - ASSERT(i40e->i40e_vsi_kstat == NULL);
670 +#ifdef DEBUG
671 + for (uint_t i = 0; i < i40e->i40e_num_rx_groups; i++) {
672 + ASSERT3P(i40e->i40e_vsis[i].iv_kstats, ==, NULL);
673 + }
674 +#endif
675 +
674 676 if (i40e->i40e_pf_kstat != NULL) {
675 677 kstat_delete(i40e->i40e_pf_kstat);
676 678 i40e->i40e_pf_kstat = NULL;
677 679 }
678 680
679 681 mutex_destroy(&i40e->i40e_stat_lock);
680 682 }
681 683
682 684 boolean_t
683 685 i40e_stats_init(i40e_t *i40e)
684 686 {
685 687 mutex_init(&i40e->i40e_stat_lock, NULL, MUTEX_DRIVER, NULL);
686 688 if (i40e_stat_pf_init(i40e) == B_FALSE) {
687 689 mutex_destroy(&i40e->i40e_stat_lock);
688 690 return (B_FALSE);
689 691 }
690 692
691 693 return (B_TRUE);
692 694 }
693 695
694 696 /*
695 697 * For Nemo/GLDv3.
696 698 */
697 699 int
698 700 i40e_m_stat(void *arg, uint_t stat, uint64_t *val)
699 701 {
700 702 i40e_t *i40e = (i40e_t *)arg;
701 703 i40e_hw_t *hw = &i40e->i40e_hw_space;
702 704 int port = i40e->i40e_hw_space.port;
703 705 i40e_pf_stats_t *ips;
704 706 i40e_pf_kstats_t *ipk;
705 707
706 708
707 709 ASSERT(i40e->i40e_pf_kstat != NULL);
708 710 ips = &i40e->i40e_pf_stat;
709 711 ipk = i40e->i40e_pf_kstat->ks_data;
710 712
711 713 /*
712 714 * We need both locks, as various stats are protected by different
713 715 * things here.
714 716 */
715 717 mutex_enter(&i40e->i40e_general_lock);
716 718
717 719 if (i40e->i40e_state & I40E_SUSPENDED) {
718 720 mutex_exit(&i40e->i40e_general_lock);
719 721 return (ECANCELED);
720 722 }
721 723
722 724 mutex_enter(&i40e->i40e_stat_lock);
723 725
724 726 /*
725 727 * Unfortunately the GLDv3 conflates two rather different things here.
726 728 * We're combining statistics about the physical port represented by
727 729 * this instance with statistics that describe the properties of the
728 730 * logical interface. As such, we're going to use the various aspects of
729 731 * the port to describe these stats as they represent what the physical
730 732 * instance is doing, even though that that means some tools may be
731 733 * confused and that to see the logical traffic on the interface itself
732 734 * sans VNICs and the like will require more work.
733 735 *
734 736 * Stats which are not listed in this switch statement are unimplemented
735 737 * at this time in hardware or don't currently apply to the device.
736 738 */
737 739 switch (stat) {
738 740 /* MIB-II stats (RFC 1213 and RFC 1573) */
739 741 case MAC_STAT_IFSPEED:
740 742 *val = i40e->i40e_link_speed * 1000000ull;
741 743 break;
742 744 case MAC_STAT_MULTIRCV:
743 745 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPRCL(port),
744 746 &ipk->ipk_rx_multicast, &ips->ips_rx_multicast, B_FALSE);
745 747 *val = ipk->ipk_rx_multicast.value.ui64;
746 748 break;
747 749 case MAC_STAT_BRDCSTRCV:
748 750 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPRCL(port),
749 751 &ipk->ipk_rx_broadcast, &ips->ips_rx_broadcast, B_FALSE);
750 752 *val = ipk->ipk_rx_broadcast.value.ui64;
751 753 break;
752 754 case MAC_STAT_MULTIXMT:
753 755 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPTCL(port),
754 756 &ipk->ipk_tx_multicast, &ips->ips_tx_multicast, B_FALSE);
755 757 *val = ipk->ipk_tx_multicast.value.ui64;
756 758 break;
757 759 case MAC_STAT_BRDCSTXMT:
758 760 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPTCL(port),
759 761 &ipk->ipk_tx_broadcast, &ips->ips_tx_broadcast, B_FALSE);
760 762 *val = ipk->ipk_tx_broadcast.value.ui64;
761 763 break;
762 764 case MAC_STAT_NORCVBUF:
763 765 i40e_stat_get_uint32(i40e, I40E_GLPRT_RDPC(port),
764 766 &ipk->ipk_rx_discards, &ips->ips_rx_discards, B_FALSE);
765 767 i40e_stat_get_uint32(i40e, I40E_GLPRT_LDPC(port),
766 768 &ipk->ipk_rx_vm_discards, &ips->ips_rx_vm_discards,
767 769 B_FALSE);
768 770 *val = ipk->ipk_rx_discards.value.ui64 +
769 771 ipk->ipk_rx_vm_discards.value.ui64;
770 772 break;
771 773 /*
772 774 * Note, that some RXERR2 stats are also duplicated by the switch filter
773 775 * stats; however, since we're not using those at this time, it seems
774 776 * reasonable to include them.
775 777 */
776 778 case MAC_STAT_IERRORS:
777 779 i40e_stat_get_uint32(i40e, I40E_GLPRT_CRCERRS(port),
778 780 &ipk->ipk_crc_errors, &ips->ips_crc_errors, B_FALSE);
779 781 i40e_stat_get_uint32(i40e, I40E_GLPRT_ILLERRC(port),
780 782 &ipk->ipk_illegal_bytes, &ips->ips_illegal_bytes, B_FALSE);
781 783 i40e_stat_get_uint32(i40e, I40E_GLPRT_RLEC(port),
782 784 &ipk->ipk_rx_length_errors, &ips->ips_rx_length_errors,
783 785 B_FALSE);
784 786 i40e_stat_get_uint48(i40e, I40E_GL_RXERR1_L(port),
785 787 &ipk->ipk_rx_err1, &ips->ips_rx_err1, B_FALSE);
786 788 i40e_stat_get_uint48(i40e, I40E_GL_RXERR2_L(port),
787 789 &ipk->ipk_rx_err2, &ips->ips_rx_err2, B_FALSE);
788 790
789 791 *val = ipk->ipk_crc_errors.value.ui64 +
790 792 ipk->ipk_illegal_bytes.value.ui64 +
791 793 ipk->ipk_rx_length_errors.value.ui64 +
792 794 ipk->ipk_rx_err1.value.ui64 +
793 795 ipk->ipk_rx_err2.value.ui64;
794 796 break;
795 797 case MAC_STAT_UNKNOWNS:
796 798 i40e_stat_get_uint32(i40e, I40E_GLPRT_RUPP(port),
797 799 &ipk->ipk_rx_unknown_protocol,
798 800 &ips->ips_rx_unknown_protocol,
799 801 B_FALSE);
800 802 *val = ipk->ipk_rx_unknown_protocol.value.ui64;
801 803 break;
802 804 case MAC_STAT_RBYTES:
803 805 i40e_stat_get_uint48(i40e, I40E_GLPRT_GORCL(port),
804 806 &ipk->ipk_rx_bytes, &ips->ips_rx_bytes, B_FALSE);
805 807 *val = ipk->ipk_rx_bytes.value.ui64;
806 808 break;
807 809 case MAC_STAT_IPACKETS:
808 810 i40e_stat_get_uint48(i40e, I40E_GLPRT_UPRCL(port),
809 811 &ipk->ipk_rx_unicast, &ips->ips_rx_unicast, B_FALSE);
810 812 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPRCL(port),
811 813 &ipk->ipk_rx_multicast, &ips->ips_rx_multicast, B_FALSE);
812 814 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPRCL(port),
813 815 &ipk->ipk_rx_broadcast, &ips->ips_rx_broadcast, B_FALSE);
814 816 *val = ipk->ipk_rx_unicast.value.ui64 +
815 817 ipk->ipk_rx_multicast.value.ui64 +
816 818 ipk->ipk_rx_broadcast.value.ui64;
817 819 break;
818 820 case MAC_STAT_OBYTES:
819 821 i40e_stat_get_uint48(i40e, I40E_GLPRT_GOTCL(port),
820 822 &ipk->ipk_tx_bytes, &ips->ips_tx_bytes, B_FALSE);
821 823 *val = ipk->ipk_tx_bytes.value.ui64;
822 824 break;
823 825 case MAC_STAT_OPACKETS:
824 826 i40e_stat_get_uint48(i40e, I40E_GLPRT_UPTCL(port),
825 827 &ipk->ipk_tx_unicast, &ips->ips_tx_unicast, B_FALSE);
826 828 i40e_stat_get_uint48(i40e, I40E_GLPRT_MPTCL(port),
827 829 &ipk->ipk_tx_multicast, &ips->ips_tx_multicast, B_FALSE);
828 830 i40e_stat_get_uint48(i40e, I40E_GLPRT_BPTCL(port),
829 831 &ipk->ipk_tx_broadcast, &ips->ips_tx_broadcast, B_FALSE);
830 832 *val = ipk->ipk_tx_unicast.value.ui64 +
831 833 ipk->ipk_tx_multicast.value.ui64 +
832 834 ipk->ipk_tx_broadcast.value.ui64;
833 835 break;
834 836 case MAC_STAT_UNDERFLOWS:
835 837 i40e_stat_get_uint32(i40e, I40E_GLPRT_RUC(port),
836 838 &ipk->ipk_rx_undersize, &ips->ips_rx_undersize, B_FALSE);
837 839 i40e_stat_get_uint32(i40e, I40E_GLPRT_RFC(port),
838 840 &ipk->ipk_rx_fragments, &ips->ips_rx_fragments, B_FALSE);
839 841 i40e_stat_get_uint32(i40e, I40E_GLPRT_MSPDC(port),
840 842 &ipk->ipk_rx_short_discards, &ips->ips_rx_short_discards,
841 843 B_FALSE);
842 844 *val = ipk->ipk_rx_undersize.value.ui64 +
843 845 ipk->ipk_rx_fragments.value.ui64 +
844 846 ipk->ipk_rx_short_discards.value.ui64;
845 847 break;
846 848 case MAC_STAT_OVERFLOWS:
847 849 i40e_stat_get_uint32(i40e, I40E_GLPRT_ROC(port),
848 850 &ipk->ipk_rx_oversize, &ips->ips_rx_oversize, B_FALSE);
849 851 i40e_stat_get_uint32(i40e, I40E_GLPRT_RJC(port),
850 852 &ipk->ipk_rx_jabber, &ips->ips_rx_jabber, B_FALSE);
851 853 *val = ipk->ipk_rx_oversize.value.ui64 +
852 854 ipk->ipk_rx_fragments.value.ui64;
853 855 break;
854 856
855 857 /* RFC 1643 stats */
856 858 case ETHER_STAT_FCS_ERRORS:
857 859 i40e_stat_get_uint32(i40e, I40E_GLPRT_CRCERRS(port),
858 860 &ipk->ipk_crc_errors, &ips->ips_crc_errors, B_FALSE);
859 861 *val = ipk->ipk_crc_errors.value.ui64;
860 862 break;
861 863 case ETHER_STAT_TOOLONG_ERRORS:
862 864 i40e_stat_get_uint32(i40e, I40E_GLPRT_ROC(port),
863 865 &ipk->ipk_rx_oversize, &ips->ips_rx_oversize, B_FALSE);
864 866 *val = ipk->ipk_rx_oversize.value.ui64;
865 867 break;
866 868 case ETHER_STAT_MACRCV_ERRORS:
867 869 i40e_stat_get_uint32(i40e, I40E_GLPRT_ILLERRC(port),
868 870 &ipk->ipk_illegal_bytes, &ips->ips_illegal_bytes, B_FALSE);
869 871 i40e_stat_get_uint32(i40e, I40E_GLPRT_RLEC(port),
870 872 &ipk->ipk_rx_length_errors, &ips->ips_rx_length_errors,
871 873 B_FALSE);
872 874 i40e_stat_get_uint32(i40e, I40E_GLPRT_RFC(port),
873 875 &ipk->ipk_rx_fragments, &ips->ips_rx_fragments, B_FALSE);
874 876 *val = ipk->ipk_illegal_bytes.value.ui64 +
875 877 ipk->ipk_rx_length_errors.value.ui64 +
876 878 ipk->ipk_rx_fragments.value.ui64;
877 879 break;
878 880 /* MII/GMII stats */
879 881
880 882 /*
881 883 * The receiver address is apparently the same as the port number.
882 884 */
883 885 case ETHER_STAT_XCVR_ADDR:
884 886 /* The Receiver address is apparently the same as the port */
885 887 *val = i40e->i40e_hw_space.port;
886 888 break;
887 889 case ETHER_STAT_XCVR_ID:
888 890 switch (hw->phy.media_type) {
889 891 case I40E_MEDIA_TYPE_BASET:
890 892 /*
891 893 * Transform the data here into the ID. Note, generally
892 894 * the revision is left out.
893 895 */
894 896 *val = i40e->i40e_phy.phy_id[3] << 24 |
895 897 i40e->i40e_phy.phy_id[2] << 16 |
896 898 i40e->i40e_phy.phy_id[1] << 8;
897 899 break;
898 900 case I40E_MEDIA_TYPE_FIBER:
899 901 case I40E_MEDIA_TYPE_BACKPLANE:
900 902 case I40E_MEDIA_TYPE_CX4:
901 903 case I40E_MEDIA_TYPE_DA:
902 904 case I40E_MEDIA_TYPE_VIRTUAL:
903 905 *val = i40e->i40e_phy.phy_id[0] |
904 906 i40e->i40e_phy.phy_id[1] << 8 |
905 907 i40e->i40e_phy.phy_id[2] << 16;
906 908 break;
907 909 case I40E_MEDIA_TYPE_UNKNOWN:
908 910 default:
909 911 goto unimpl;
910 912 }
911 913 break;
912 914 case ETHER_STAT_XCVR_INUSE:
913 915 switch (hw->phy.link_info.phy_type) {
914 916 case I40E_PHY_TYPE_100BASE_TX:
915 917 *val = XCVR_100T2;
916 918 break;
917 919 case I40E_PHY_TYPE_1000BASE_T:
918 920 *val = XCVR_1000T;
919 921 break;
920 922 default:
921 923 *val = XCVR_UNDEFINED;
922 924 break;
923 925 }
924 926 break;
925 927
926 928 /*
927 929 * This group answers the question of do we support a given speed in
928 930 * theory.
929 931 */
930 932 case ETHER_STAT_CAP_100FDX:
931 933 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_100MB) != 0;
932 934 break;
933 935 case ETHER_STAT_CAP_1000FDX:
934 936 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_1GB) != 0;
935 937 break;
936 938 case ETHER_STAT_CAP_10GFDX:
937 939 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_10GB) != 0;
938 940 break;
939 941 case ETHER_STAT_CAP_25GFDX:
940 942 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_25GB) != 0;
941 943 break;
942 944 case ETHER_STAT_CAP_40GFDX:
943 945 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_40GB) != 0;
944 946 break;
945 947
946 948 /*
947 949 * These ask are we currently advertising these speeds and abilities.
948 950 * Until we support setting these because we're working with a copper
949 951 * PHY, then the only things we advertise are based on the link PHY
950 952 * speeds. In other words, we advertise everything we support.
951 953 */
952 954 case ETHER_STAT_ADV_CAP_100FDX:
953 955 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_100MB) != 0;
954 956 break;
955 957 case ETHER_STAT_ADV_CAP_1000FDX:
956 958 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_1GB) != 0;
957 959 break;
958 960 case ETHER_STAT_ADV_CAP_10GFDX:
959 961 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_10GB) != 0;
960 962 break;
961 963 case ETHER_STAT_ADV_CAP_25GFDX:
962 964 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_25GB) != 0;
963 965 break;
964 966 case ETHER_STAT_ADV_CAP_40GFDX:
965 967 *val = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_40GB) != 0;
966 968 break;
967 969
968 970 /*
969 971 * These ask if the peer supports these speeds, e.g. what did they tell
970 972 * us in auto-negotiation. Unfortunately, hardware doesn't appear to
971 973 * give us a way to determine whether or not they actually support
972 974 * something, only what they have enabled. This means that all we can
973 975 * tell the user is the speed that we're currently at, unfortunately.
974 976 */
975 977 case ETHER_STAT_LP_CAP_100FDX:
976 978 *val = i40e->i40e_link_speed == 100;
977 979 break;
978 980 case ETHER_STAT_LP_CAP_1000FDX:
979 981 *val = i40e->i40e_link_speed == 1000;
980 982 break;
981 983 case ETHER_STAT_LP_CAP_10GFDX:
982 984 *val = i40e->i40e_link_speed == 10000;
983 985 break;
984 986 case ETHER_STAT_LP_CAP_25GFDX:
985 987 *val = i40e->i40e_link_speed == 25000;
986 988 break;
987 989 case ETHER_STAT_LP_CAP_40GFDX:
988 990 *val = i40e->i40e_link_speed == 40000;
989 991 break;
990 992
991 993 /*
992 994 * Statistics for unsupported speeds. Note that these often have the
993 995 * same constraints as the other ones. For example, we can't answer the
994 996 * question of the ETHER_STAT_LP_CAP family because hardware doesn't
995 997 * give us any way of knowing whether or not it does.
996 998 */
997 999 case ETHER_STAT_CAP_100HDX:
998 1000 case ETHER_STAT_CAP_1000HDX:
999 1001 case ETHER_STAT_CAP_10FDX:
1000 1002 case ETHER_STAT_CAP_10HDX:
1001 1003 case ETHER_STAT_CAP_100T4:
1002 1004 case ETHER_STAT_CAP_100GFDX:
1003 1005 case ETHER_STAT_CAP_50GFDX:
1004 1006 case ETHER_STAT_CAP_2500FDX:
1005 1007 case ETHER_STAT_CAP_5000FDX:
1006 1008 case ETHER_STAT_ADV_CAP_1000HDX:
1007 1009 case ETHER_STAT_ADV_CAP_100HDX:
1008 1010 case ETHER_STAT_ADV_CAP_10FDX:
1009 1011 case ETHER_STAT_ADV_CAP_10HDX:
1010 1012 case ETHER_STAT_ADV_CAP_100T4:
1011 1013 case ETHER_STAT_ADV_CAP_100GFDX:
1012 1014 case ETHER_STAT_ADV_CAP_50GFDX:
1013 1015 case ETHER_STAT_ADV_CAP_2500FDX:
1014 1016 case ETHER_STAT_ADV_CAP_5000FDX:
1015 1017 case ETHER_STAT_LP_CAP_1000HDX:
1016 1018 case ETHER_STAT_LP_CAP_100HDX:
1017 1019 case ETHER_STAT_LP_CAP_10FDX:
1018 1020 case ETHER_STAT_LP_CAP_10HDX:
1019 1021 case ETHER_STAT_LP_CAP_100T4:
1020 1022 case ETHER_STAT_LP_CAP_100GFDX:
1021 1023 case ETHER_STAT_LP_CAP_50GFDX:
1022 1024 case ETHER_STAT_LP_CAP_2500FDX:
1023 1025 case ETHER_STAT_LP_CAP_5000FDX:
1024 1026 *val = 0;
1025 1027 break;
1026 1028
1027 1029 case ETHER_STAT_LINK_DUPLEX:
1028 1030 *val = i40e->i40e_link_duplex;
1029 1031 break;
1030 1032 case ETHER_STAT_TOOSHORT_ERRORS:
1031 1033 i40e_stat_get_uint32(i40e, I40E_GLPRT_RUC(port),
1032 1034 &ipk->ipk_rx_undersize, &ips->ips_rx_undersize, B_FALSE);
1033 1035
1034 1036 i40e_stat_get_uint32(i40e, I40E_GLPRT_MSPDC(port),
1035 1037 &ipk->ipk_rx_short_discards, &ips->ips_rx_short_discards,
1036 1038 B_FALSE);
1037 1039 *val = ipk->ipk_rx_undersize.value.ui64 +
1038 1040 ipk->ipk_rx_short_discards.value.ui64;
1039 1041 break;
1040 1042 case ETHER_STAT_JABBER_ERRORS:
1041 1043 i40e_stat_get_uint32(i40e, I40E_GLPRT_RJC(port),
1042 1044 &ipk->ipk_rx_jabber, &ips->ips_rx_jabber, B_FALSE);
1043 1045 *val = ipk->ipk_rx_jabber.value.ui64;
1044 1046 break;
1045 1047
1046 1048 /*
1047 1049 * Non-Link speed related capabilities.
1048 1050 */
1049 1051 case ETHER_STAT_CAP_AUTONEG:
1050 1052 *val = 1;
1051 1053 break;
1052 1054
1053 1055 case ETHER_STAT_ADV_CAP_AUTONEG:
1054 1056 *val = 1;
1055 1057 break;
1056 1058
1057 1059 case ETHER_STAT_LP_CAP_AUTONEG:
1058 1060 *val = (hw->phy.link_info.an_info & I40E_AQ_LP_AN_ABILITY) != 0;
1059 1061 break;
1060 1062
1061 1063 case ETHER_STAT_LINK_AUTONEG:
1062 1064 *val = 1;
1063 1065 break;
1064 1066
1065 1067 /*
1066 1068 * Note that while the hardware does support the pause functionality, at
1067 1069 * this time we do not use it at all and effectively disable it.
1068 1070 */
1069 1071 case ETHER_STAT_CAP_ASMPAUSE:
1070 1072 *val = (i40e->i40e_phy.abilities &
1071 1073 I40E_AQ_PHY_FLAG_PAUSE_RX) != 0;
1072 1074 break;
1073 1075 case ETHER_STAT_CAP_PAUSE:
1074 1076 *val = (i40e->i40e_phy.abilities &
1075 1077 I40E_AQ_PHY_FLAG_PAUSE_TX) != 0;
1076 1078 break;
1077 1079
1078 1080 /*
1079 1081 * Because we don't support these at this time, they are always
1080 1082 * hard-coded to zero.
1081 1083 */
1082 1084 case ETHER_STAT_ADV_CAP_ASMPAUSE:
1083 1085 case ETHER_STAT_ADV_CAP_PAUSE:
1084 1086 *val = 0;
1085 1087 break;
1086 1088
1087 1089 /*
1088 1090 * Like the other LP fields, we can only answer the question have we
1089 1091 * enabled it, not whether the other end actually supports it.
1090 1092 */
1091 1093 case ETHER_STAT_LP_CAP_ASMPAUSE:
1092 1094 case ETHER_STAT_LINK_ASMPAUSE:
1093 1095 *val = (hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX) != 0;
1094 1096 break;
1095 1097 case ETHER_STAT_LP_CAP_PAUSE:
1096 1098 case ETHER_STAT_LINK_PAUSE:
1097 1099 *val = (hw->phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) != 0;
1098 1100 break;
1099 1101
1100 1102 default:
1101 1103 unimpl:
1102 1104 mutex_exit(&i40e->i40e_stat_lock);
1103 1105 mutex_exit(&i40e->i40e_general_lock);
1104 1106 return (ENOTSUP);
1105 1107 }
1106 1108
1107 1109 mutex_exit(&i40e->i40e_stat_lock);
1108 1110 mutex_exit(&i40e->i40e_general_lock);
1109 1111
1110 1112 if (i40e_check_acc_handle(i40e->i40e_osdep_space.ios_reg_handle) !=
1111 1113 DDI_FM_OK) {
1112 1114 ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_DEGRADED);
1113 1115 return (EIO);
1114 1116 }
1115 1117
1116 1118 return (0);
1117 1119 }
1118 1120
1119 1121 int
1120 1122 i40e_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
1121 1123 {
1122 1124 i40e_trqpair_t *itrq = (i40e_trqpair_t *)rh;
1123 1125 i40e_t *i40e = itrq->itrq_i40e;
1124 1126
1125 1127 if (i40e->i40e_state & I40E_SUSPENDED) {
1126 1128 return (ECANCELED);
1127 1129 }
1128 1130
1129 1131 switch (stat) {
1130 1132 case MAC_STAT_RBYTES:
1131 1133 *val = itrq->itrq_rxstat.irxs_bytes.value.ui64;
1132 1134 break;
1133 1135 case MAC_STAT_IPACKETS:
1134 1136 *val = itrq->itrq_rxstat.irxs_packets.value.ui64;
1135 1137 break;
1136 1138 default:
1137 1139 *val = 0;
1138 1140 return (ENOTSUP);
1139 1141 }
1140 1142
1141 1143 return (0);
1142 1144 }
1143 1145
1144 1146 int
1145 1147 i40e_tx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
1146 1148 {
1147 1149 i40e_trqpair_t *itrq = (i40e_trqpair_t *)rh;
1148 1150 i40e_t *i40e = itrq->itrq_i40e;
1149 1151
1150 1152 if (i40e->i40e_state & I40E_SUSPENDED) {
1151 1153 return (ECANCELED);
1152 1154 }
1153 1155
1154 1156 switch (stat) {
1155 1157 case MAC_STAT_OBYTES:
1156 1158 *val = itrq->itrq_txstat.itxs_bytes.value.ui64;
1157 1159 break;
1158 1160 case MAC_STAT_OPACKETS:
1159 1161 *val = itrq->itrq_txstat.itxs_packets.value.ui64;
1160 1162 break;
1161 1163 default:
1162 1164 *val = 0;
1163 1165 return (ENOTSUP);
1164 1166 }
1165 1167
1166 1168 return (0);
1167 1169 }
1168 1170
1169 1171 /*
1170 1172 * When we end up refactoring all off the queue assignments and have non-static
1171 1173 * queue to VSI mappings, then we may need to revisit the general locking
1172 1174 * strategy that we employ and have the kstat creation / deletion be part of the
1173 1175 * ring start and stop routines.
1174 1176 */
1175 1177 void
1176 1178 i40e_stats_trqpair_fini(i40e_trqpair_t *itrq)
1177 1179 {
1178 1180 if (itrq->itrq_txkstat != NULL) {
1179 1181 kstat_delete(itrq->itrq_txkstat);
1180 1182 itrq->itrq_txkstat = NULL;
1181 1183 }
1182 1184
1183 1185 if (itrq->itrq_rxkstat != NULL) {
1184 1186 kstat_delete(itrq->itrq_rxkstat);
1185 1187 itrq->itrq_rxkstat = NULL;
1186 1188 }
1187 1189 }
1188 1190
1189 1191 boolean_t
1190 1192 i40e_stats_trqpair_init(i40e_trqpair_t *itrq)
1191 1193 {
1192 1194 char buf[128];
1193 1195 i40e_t *i40e = itrq->itrq_i40e;
1194 1196 i40e_txq_stat_t *tsp = &itrq->itrq_txstat;
1195 1197 i40e_rxq_stat_t *rsp = &itrq->itrq_rxstat;
1196 1198
1197 1199 (void) snprintf(buf, sizeof (buf), "trqpair_tx_%d", itrq->itrq_index);
1198 1200 itrq->itrq_txkstat = kstat_create(I40E_MODULE_NAME,
1199 1201 ddi_get_instance(i40e->i40e_dip), buf, "net", KSTAT_TYPE_NAMED,
1200 1202 sizeof (i40e_txq_stat_t) / sizeof (kstat_named_t),
1201 1203 KSTAT_FLAG_VIRTUAL);
1202 1204
1203 1205 if (itrq->itrq_txkstat == NULL)
1204 1206 return (B_FALSE);
1205 1207
1206 1208 (void) snprintf(buf, sizeof (buf), "trqpair_rx_%d", itrq->itrq_index);
1207 1209 itrq->itrq_rxkstat = kstat_create(I40E_MODULE_NAME,
1208 1210 ddi_get_instance(i40e->i40e_dip), buf, "net", KSTAT_TYPE_NAMED,
1209 1211 sizeof (i40e_rxq_stat_t) / sizeof (kstat_named_t),
1210 1212 KSTAT_FLAG_VIRTUAL);
1211 1213
1212 1214 if (itrq->itrq_rxkstat == NULL) {
1213 1215 kstat_delete(itrq->itrq_txkstat);
1214 1216 itrq->itrq_txkstat = NULL;
1215 1217 return (B_FALSE);
1216 1218 }
1217 1219
1218 1220 itrq->itrq_txkstat->ks_data = &itrq->itrq_txstat;
1219 1221 itrq->itrq_rxkstat->ks_data = &itrq->itrq_rxstat;
1220 1222
1221 1223 kstat_named_init(&tsp->itxs_bytes, "tx_bytes",
1222 1224 KSTAT_DATA_UINT64);
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1223 1225 tsp->itxs_bytes.value.ui64 = 0;
1224 1226 kstat_named_init(&tsp->itxs_packets, "tx_packets",
1225 1227 KSTAT_DATA_UINT64);
1226 1228 tsp->itxs_packets.value.ui64 = 0;
1227 1229 kstat_named_init(&tsp->itxs_descriptors, "tx_descriptors",
1228 1230 KSTAT_DATA_UINT64);
1229 1231 tsp->itxs_descriptors.value.ui64 = 0;
1230 1232 kstat_named_init(&tsp->itxs_recycled, "tx_recycled",
1231 1233 KSTAT_DATA_UINT64);
1232 1234 tsp->itxs_recycled.value.ui64 = 0;
1235 + kstat_named_init(&tsp->itxs_force_copy, "tx_force_copy",
1236 + KSTAT_DATA_UINT64);
1237 + tsp->itxs_force_copy.value.ui64 = 0;
1238 + kstat_named_init(&tsp->itxs_tso_force_copy, "tx_tso_force_copy",
1239 + KSTAT_DATA_UINT64);
1240 + tsp->itxs_tso_force_copy.value.ui64 = 0;
1233 1241
1234 1242 kstat_named_init(&tsp->itxs_hck_meoifail, "tx_hck_meoifail",
1235 1243 KSTAT_DATA_UINT64);
1236 1244 tsp->itxs_hck_meoifail.value.ui64 = 0;
1237 1245 kstat_named_init(&tsp->itxs_hck_nol2info, "tx_hck_nol2info",
1238 1246 KSTAT_DATA_UINT64);
1239 1247 tsp->itxs_hck_nol2info.value.ui64 = 0;
1240 1248 kstat_named_init(&tsp->itxs_hck_nol3info, "tx_hck_nol3info",
1241 1249 KSTAT_DATA_UINT64);
1242 1250 tsp->itxs_hck_nol3info.value.ui64 = 0;
1243 1251 kstat_named_init(&tsp->itxs_hck_nol4info, "tx_hck_nol4info",
1244 1252 KSTAT_DATA_UINT64);
1245 1253 tsp->itxs_hck_nol4info.value.ui64 = 0;
1246 1254 kstat_named_init(&tsp->itxs_hck_badl3, "tx_hck_badl3",
1247 1255 KSTAT_DATA_UINT64);
1248 1256 tsp->itxs_hck_badl3.value.ui64 = 0;
1249 1257 kstat_named_init(&tsp->itxs_hck_badl4, "tx_hck_badl4",
1250 1258 KSTAT_DATA_UINT64);
1251 1259 tsp->itxs_hck_badl4.value.ui64 = 0;
1260 + kstat_named_init(&tsp->itxs_lso_nohck, "tx_lso_nohck",
1261 + KSTAT_DATA_UINT64);
1262 + tsp->itxs_lso_nohck.value.ui64 = 0;
1263 + kstat_named_init(&tsp->itxs_bind_fails, "tx_bind_fails",
1264 + KSTAT_DATA_UINT64);
1265 + tsp->itxs_bind_fails.value.ui64 = 0;
1252 1266 kstat_named_init(&tsp->itxs_err_notcb, "tx_err_notcb",
1253 1267 KSTAT_DATA_UINT64);
1254 1268 tsp->itxs_err_notcb.value.ui64 = 0;
1255 1269 kstat_named_init(&tsp->itxs_err_nodescs, "tx_err_nodescs",
1256 1270 KSTAT_DATA_UINT64);
1257 1271 tsp->itxs_err_nodescs.value.ui64 = 0;
1258 1272 kstat_named_init(&tsp->itxs_err_context, "tx_err_context",
1259 1273 KSTAT_DATA_UINT64);
1260 1274 tsp->itxs_err_context.value.ui64 = 0;
1261 1275 kstat_named_init(&tsp->itxs_num_unblocked, "tx_num_unblocked",
1262 1276 KSTAT_DATA_UINT64);
1263 1277 tsp->itxs_num_unblocked.value.ui64 = 0;
1264 1278
1265 1279
1266 1280 kstat_named_init(&rsp->irxs_bytes, "rx_bytes",
1267 1281 KSTAT_DATA_UINT64);
1268 1282 rsp->irxs_bytes.value.ui64 = 0;
1269 1283 kstat_named_init(&rsp->irxs_packets, "rx_packets",
1270 1284 KSTAT_DATA_UINT64);
1271 1285 rsp->irxs_packets.value.ui64 = 0;
1272 1286 kstat_named_init(&rsp->irxs_rx_desc_error, "rx_desc_error",
1273 1287 KSTAT_DATA_UINT64);
1274 1288 rsp->irxs_rx_desc_error.value.ui64 = 0;
1275 1289 kstat_named_init(&rsp->irxs_rx_intr_limit, "rx_intr_limit",
1276 1290 KSTAT_DATA_UINT64);
1277 1291 rsp->irxs_rx_intr_limit.value.ui64 = 0;
1278 1292 kstat_named_init(&rsp->irxs_rx_bind_norcb, "rx_bind_norcb",
1279 1293 KSTAT_DATA_UINT64);
1280 1294 rsp->irxs_rx_bind_norcb.value.ui64 = 0;
1281 1295 kstat_named_init(&rsp->irxs_rx_bind_nomp, "rx_bind_nomp",
1282 1296 KSTAT_DATA_UINT64);
1283 1297 rsp->irxs_rx_bind_nomp.value.ui64 = 0;
1284 1298 kstat_named_init(&rsp->irxs_rx_copy_nomem, "rx_copy_nomem",
1285 1299 KSTAT_DATA_UINT64);
1286 1300 rsp->irxs_rx_copy_nomem.value.ui64 = 0;
1287 1301 kstat_named_init(&rsp->irxs_hck_v4hdrok, "rx_hck_v4hdrok",
1288 1302 KSTAT_DATA_UINT64);
1289 1303 rsp->irxs_hck_v4hdrok.value.ui64 = 0;
1290 1304 kstat_named_init(&rsp->irxs_hck_l4hdrok, "rx_hck_l4hdrok",
1291 1305 KSTAT_DATA_UINT64);
1292 1306 rsp->irxs_hck_l4hdrok.value.ui64 = 0;
1293 1307 kstat_named_init(&rsp->irxs_hck_unknown, "rx_hck_unknown",
1294 1308 KSTAT_DATA_UINT64);
1295 1309 rsp->irxs_hck_unknown.value.ui64 = 0;
1296 1310 kstat_named_init(&rsp->irxs_hck_nol3l4p, "rx_hck_nol3l4p",
1297 1311 KSTAT_DATA_UINT64);
1298 1312 rsp->irxs_hck_nol3l4p.value.ui64 = 0;
1299 1313 kstat_named_init(&rsp->irxs_hck_iperr, "rx_hck_iperr",
1300 1314 KSTAT_DATA_UINT64);
1301 1315 rsp->irxs_hck_iperr.value.ui64 = 0;
1302 1316 kstat_named_init(&rsp->irxs_hck_eiperr, "rx_hck_eiperr",
1303 1317 KSTAT_DATA_UINT64);
1304 1318 rsp->irxs_hck_eiperr.value.ui64 = 0;
1305 1319 kstat_named_init(&rsp->irxs_hck_l4err, "rx_hck_l4err",
1306 1320 KSTAT_DATA_UINT64);
1307 1321 rsp->irxs_hck_l4err.value.ui64 = 0;
1308 1322 kstat_named_init(&rsp->irxs_hck_v6skip, "rx_hck_v6skip",
1309 1323 KSTAT_DATA_UINT64);
1310 1324 rsp->irxs_hck_v6skip.value.ui64 = 0;
1311 1325 kstat_named_init(&rsp->irxs_hck_set, "rx_hck_set",
1312 1326 KSTAT_DATA_UINT64);
1313 1327 rsp->irxs_hck_set.value.ui64 = 0;
1314 1328 kstat_named_init(&rsp->irxs_hck_miss, "rx_hck_miss",
1315 1329 KSTAT_DATA_UINT64);
1316 1330 rsp->irxs_hck_miss.value.ui64 = 0;
1317 1331
1318 1332 kstat_install(itrq->itrq_txkstat);
1319 1333 kstat_install(itrq->itrq_rxkstat);
1320 1334
1321 1335 return (B_TRUE);
1322 1336 }
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