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NEX-8705 Drivers for ATTO Celerity FC-162E Gen 5 and Celerity FC-162P Gen 6 16GB FC cards support
Reviewed by: Dan Fields <dan.fields@nexenta.com>
Reviewed by: Rick McNeal <rick.mcneal@nexenta.com>
NEX-1878 update emlxs from source provided by Emulex


1044 
1045 
1046 /*ARGSUSED*/
1047 extern void
1048 emlxs_mb_heartbeat(emlxs_hba_t *hba, MAILBOXQ *mbq)
1049 {
1050         MAILBOX *mb = (MAILBOX *)mbq;
1051 
1052         bzero((void *) mb, MAILBOX_CMD_BSIZE);
1053 
1054         mb->mbxCommand = MBX_HEARTBEAT;
1055         mb->mbxOwner = OWN_HOST;
1056         mbq->mbox_cmpl = NULL; /* no cmpl needed for hbeat */
1057         mbq->port = (void *)&PPORT;
1058 
1059         return;
1060 
1061 } /* emlxs_mb_heartbeat() */
1062 
1063 



































1064 #ifdef MSI_SUPPORT
1065 
1066 /*ARGSUSED*/
1067 extern void
1068 emlxs_mb_config_msi(emlxs_hba_t *hba, MAILBOXQ *mbq, uint32_t *intr_map,
1069     uint32_t intr_count)
1070 {
1071         MAILBOX *mb = (MAILBOX *)mbq;
1072         uint16_t i;
1073         uint32_t mask;
1074 
1075         bzero((void *)mb, MAILBOX_CMD_BSIZE);
1076 
1077         mb->mbxCommand = MBX_CONFIG_MSI;
1078 
1079         /* Set the default message id to zero */
1080         mb->un.varCfgMSI.defaultPresent = 1;
1081         mb->un.varCfgMSI.defaultMessageNumber = 0;
1082 
1083         for (i = 1; i < intr_count; i++) {




1044 
1045 
1046 /*ARGSUSED*/
1047 extern void
1048 emlxs_mb_heartbeat(emlxs_hba_t *hba, MAILBOXQ *mbq)
1049 {
1050         MAILBOX *mb = (MAILBOX *)mbq;
1051 
1052         bzero((void *) mb, MAILBOX_CMD_BSIZE);
1053 
1054         mb->mbxCommand = MBX_HEARTBEAT;
1055         mb->mbxOwner = OWN_HOST;
1056         mbq->mbox_cmpl = NULL; /* no cmpl needed for hbeat */
1057         mbq->port = (void *)&PPORT;
1058 
1059         return;
1060 
1061 } /* emlxs_mb_heartbeat() */
1062 
1063 
1064 /*ARGSUSED*/
1065 extern void
1066 emlxs_mb_gpio_write(emlxs_hba_t *hba, MAILBOXQ *mbq, uint8_t pin, uint8_t val)
1067 {
1068         emlxs_port_t *port = &PPORT;
1069         MAILBOX4 *mb4;
1070         be_req_hdr_t *be_req;
1071         mbox_req_hdr_t *hdr_req;
1072         IOCTL_LOWLEVEL_GPIO_RDWR *gpio;
1073 
1074         bzero((void *) mbq, sizeof (MAILBOXQ));
1075 
1076         mbq->port = port;
1077 
1078         mb4 = (MAILBOX4 *)mbq->mbox;
1079         mb4->mbxCommand = MBX_SLI_CONFIG;
1080         mb4->mbxOwner = OWN_HOST;
1081 
1082         be_req = (be_req_hdr_t *)&mb4->un.varSLIConfig.be;
1083         be_req->embedded = 1;
1084         be_req->payload_length = sizeof (mbox_req_hdr_t) +
1085             sizeof (IOCTL_LOWLEVEL_GPIO_RDWR);
1086 
1087         hdr_req = &be_req->un_hdr.hdr_req;
1088         hdr_req->subsystem = IOCTL_SUBSYSTEM_LOWLEVEL;
1089         hdr_req->opcode = LOWLEVEL_OPCODE_GPIO_RDWR;
1090         hdr_req->timeout = 0;
1091         hdr_req->req_length = sizeof (IOCTL_LOWLEVEL_GPIO_RDWR);
1092 
1093         gpio = (IOCTL_LOWLEVEL_GPIO_RDWR *)&mb4->un.varSLIConfig.payload;
1094         gpio->params.request.GpioAction = LOWLEVEL_GPIO_ACT_WRITE;
1095         gpio->params.request.LogicalPin = pin;
1096         gpio->params.request.PinValue = val;
1097 } /* emlxs_mb_gpio_write */
1098 
1099 #ifdef MSI_SUPPORT
1100 
1101 /*ARGSUSED*/
1102 extern void
1103 emlxs_mb_config_msi(emlxs_hba_t *hba, MAILBOXQ *mbq, uint32_t *intr_map,
1104     uint32_t intr_count)
1105 {
1106         MAILBOX *mb = (MAILBOX *)mbq;
1107         uint16_t i;
1108         uint32_t mask;
1109 
1110         bzero((void *)mb, MAILBOX_CMD_BSIZE);
1111 
1112         mb->mbxCommand = MBX_CONFIG_MSI;
1113 
1114         /* Set the default message id to zero */
1115         mb->un.varCfgMSI.defaultPresent = 1;
1116         mb->un.varCfgMSI.defaultMessageNumber = 0;
1117 
1118         for (i = 1; i < intr_count; i++) {