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MFV: illumos-gate@5bb0bdfe588c5df0f63ff8ac292cd608a5f4492a
9950 Need support for Intel I219 v6-v9
Reviewed by: Jason King <jason.king@joyent.com>
Reviewed by: Garrett D'Amore <garrett@damore.org>
Approved by: Garrett D'Amore <garrett@damore.org>
Author: Robert Mustacchi <rm@joyent.com>
4547 e1000g common code doesn't account for LockMAC
Reviewed by: Jerry Jelinek <jerry.jelinek@joyent.com>
Reviewed by: Richard Lowe <richlowe@richlowe.net>
Reviewed by: Garrett D'Amore <garrett@damore.org>
Reviewed by: Jason King <jason.brian.king@gmail.com>
Approved by: Garrett D'Amore <garrett@damore.org>
re #12675 rb4109 some e1000g devices don't support 15 unicast addresses
*** 23,33 ****
*/
/*
* Copyright 2012 DEY Storage Systems, Inc. All rights reserved.
* Copyright 2013 Nexenta Systems, Inc. All rights reserved.
! * Copyright (c) 2017, Joyent, Inc.
*/
/*
* **********************************************************************
* *
--- 23,33 ----
*/
/*
* Copyright 2012 DEY Storage Systems, Inc. All rights reserved.
* Copyright 2013 Nexenta Systems, Inc. All rights reserved.
! * Copyright (c) 2018, Joyent, Inc.
*/
/*
* **********************************************************************
* *
*** 709,718 ****
--- 709,719 ----
"ddi_regs_map_setup for ICH flash failed");
goto regs_map_fail;
}
break;
case e1000_pch_spt:
+ case e1000_pch_cnp:
/*
* On the SPT, the device flash is actually in BAR0, not a
* separate BAR. Therefore we end up setting the
* ich_flash_handle to be the same as the register handle.
* We mark the same to reduce the confusion in the other
*** 778,788 ****
return (DDI_SUCCESS);
regs_map_fail:
if (osdep->reg_handle != NULL)
ddi_regs_map_free(&osdep->reg_handle);
! if (osdep->ich_flash_handle != NULL && hw->mac.type != e1000_pch_spt)
ddi_regs_map_free(&osdep->ich_flash_handle);
return (DDI_FAILURE);
}
static int
--- 779,789 ----
return (DDI_SUCCESS);
regs_map_fail:
if (osdep->reg_handle != NULL)
ddi_regs_map_free(&osdep->reg_handle);
! if (osdep->ich_flash_handle != NULL && hw->mac.type < e1000_pch_spt)
ddi_regs_map_free(&osdep->ich_flash_handle);
return (DDI_FAILURE);
}
static int
*** 907,916 ****
--- 908,918 ----
break;
/* pch2 can do jumbo frames up to 9K */
case e1000_pch2lan:
case e1000_pch_lpt:
case e1000_pch_spt:
+ case e1000_pch_cnp:
Adapter->max_mtu = MAXIMUM_MTU_9K;
break;
/* types with a special limit */
case e1000_82571:
case e1000_82572:
*** 1145,1155 ****
if (Adapter->attach_progress & ATTACH_PROGRESS_REGS_MAP) {
if (Adapter->osdep.reg_handle != NULL)
ddi_regs_map_free(&Adapter->osdep.reg_handle);
if (Adapter->osdep.ich_flash_handle != NULL &&
! Adapter->shared.mac.type != e1000_pch_spt)
ddi_regs_map_free(&Adapter->osdep.ich_flash_handle);
if (Adapter->osdep.io_reg_handle != NULL)
ddi_regs_map_free(&Adapter->osdep.io_reg_handle);
}
--- 1147,1157 ----
if (Adapter->attach_progress & ATTACH_PROGRESS_REGS_MAP) {
if (Adapter->osdep.reg_handle != NULL)
ddi_regs_map_free(&Adapter->osdep.reg_handle);
if (Adapter->osdep.ich_flash_handle != NULL &&
! Adapter->shared.mac.type < e1000_pch_spt)
ddi_regs_map_free(&Adapter->osdep.ich_flash_handle);
if (Adapter->osdep.io_reg_handle != NULL)
ddi_regs_map_free(&Adapter->osdep.io_reg_handle);
}
*** 1484,1493 ****
--- 1486,1497 ----
pba = E1000_PBA_26K;
} else if (hw->mac.type == e1000_pch_lpt) {
pba = E1000_PBA_26K;
} else if (hw->mac.type == e1000_pch_spt) {
pba = E1000_PBA_26K;
+ } else if (hw->mac.type == e1000_pch_cnp) {
+ pba = E1000_PBA_26K;
} else {
/*
* Total FIFO is 40K
*/
if (Adapter->max_frame_size > FRAME_SIZE_UPTO_8K)
*** 1710,1723 ****
*/
switch (hw->phy.media_type) {
case e1000_media_type_copper:
if (hw->mac.get_link_status) {
/*
! * SPT devices need a bit of extra time before we ask
! * them.
*/
! if (hw->mac.type == e1000_pch_spt)
msec_delay(50);
(void) e1000_check_for_link(hw);
if ((E1000_READ_REG(hw, E1000_STATUS) &
E1000_STATUS_LU)) {
link_up = B_TRUE;
--- 1714,1727 ----
*/
switch (hw->phy.media_type) {
case e1000_media_type_copper:
if (hw->mac.get_link_status) {
/*
! * SPT and newer devices need a bit of extra time before
! * we ask them.
*/
! if (hw->mac.type >= e1000_pch_spt)
msec_delay(50);
(void) e1000_check_for_link(hw);
if ((E1000_READ_REG(hw, E1000_STATUS) &
E1000_STATUS_LU)) {
link_up = B_TRUE;
*** 2074,2084 ****
/*
* The I219, eg. the pch_spt, has bugs such that we must ensure that
* rings are flushed before we do anything else. This must be done
* before we release DMA resources.
*/
! if (Adapter->shared.mac.type == e1000_pch_spt)
e1000g_flush_desc_rings(Adapter);
if (global) {
e1000g_release_dma_resources(Adapter);
--- 2078,2088 ----
/*
* The I219, eg. the pch_spt, has bugs such that we must ensure that
* rings are flushed before we do anything else. This must be done
* before we release DMA resources.
*/
! if (Adapter->shared.mac.type >= e1000_pch_spt)
e1000g_flush_desc_rings(Adapter);
if (global) {
e1000g_release_dma_resources(Adapter);
*** 2534,2545 ****
* few of the bits set in the FWSM register. If the value is
* zero, everything is available. If the value is 1, none of the
* additional registers are available. If the value is 2-7, only
* that number are available.
*/
! if (hw->mac.type == e1000_pch_lpt ||
! hw->mac.type == e1000_pch_spt) {
uint32_t locked, rar;
locked = E1000_READ_REG(hw, E1000_FWSM) &
E1000_FWSM_WLOCK_MAC_MASK;
locked >>= E1000_FWSM_WLOCK_MAC_SHIFT;
--- 2538,2548 ----
* few of the bits set in the FWSM register. If the value is
* zero, everything is available. If the value is 1, none of the
* additional registers are available. If the value is 2-7, only
* that number are available.
*/
! if (hw->mac.type >= e1000_pch_lpt) {
uint32_t locked, rar;
locked = E1000_READ_REG(hw, E1000_FWSM) &
E1000_FWSM_WLOCK_MAC_MASK;
locked >>= E1000_FWSM_WLOCK_MAC_SHIFT;