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Reviewed by: Toomas Soome <tsoome@me.com>
Reviewed by: Robert Mustacchi <rm@joyent.com>
Approved by: Dan McDonald <danmcd@joyent.com>
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--- old/usr/src/uts/common/io/cxgbe/t4nex/t4nex.h
+++ new/usr/src/uts/common/io/cxgbe/t4nex/t4nex.h
1 1 /*
2 2 * This file and its contents are supplied under the terms of the
3 3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 4 * You may only use this file in accordance with the terms of version
5 5 * 1.0 of the CDDL.
6 6 *
7 7 * A full copy of the text of the CDDL should have accompanied this
8 8 * source. A copy of the CDDL is also available via the Internet at
9 9 * http://www.illumos.org/license/CDDL.
10 10 */
11 11
12 12 /*
13 13 * This file is part of the Chelsio T4 support code.
14 14 *
15 15 * Copyright (C) 2011-2013 Chelsio Communications. All rights reserved.
16 16 *
17 17 * This program is distributed in the hope that it will be useful, but WITHOUT
18 18 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 19 * FITNESS FOR A PARTICULAR PURPOSE. See the LICENSE file included in this
20 20 * release for licensing terms and conditions.
21 21 */
22 22
23 23 #ifndef __T4NEX_H
24 24 #define __T4NEX_H
25 25
26 26 #ifdef __cplusplus
27 27 extern "C" {
28 28 #endif
29 29
30 30 #define T4_IOCTL ((('t' << 16) | '4') << 8)
31 31 #define T4_IOCTL_PCIGET32 (T4_IOCTL + 1)
32 32 #define T4_IOCTL_PCIPUT32 (T4_IOCTL + 2)
33 33 #define T4_IOCTL_GET32 (T4_IOCTL + 3)
34 34 #define T4_IOCTL_PUT32 (T4_IOCTL + 4)
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35 35 #define T4_IOCTL_REGDUMP (T4_IOCTL + 5)
36 36 #define T4_IOCTL_SGE_CONTEXT (T4_IOCTL + 6)
37 37 #define T4_IOCTL_DEVLOG (T4_IOCTL + 7)
38 38 #define T4_IOCTL_GET_MEM (T4_IOCTL + 8)
39 39 #define T4_IOCTL_GET_TID_TAB (T4_IOCTL + 9)
40 40 #define T4_IOCTL_GET_MBOX (T4_IOCTL + 10)
41 41 #define T4_IOCTL_GET_CIM_LA (T4_IOCTL + 11)
42 42 #define T4_IOCTL_GET_CIM_QCFG (T4_IOCTL + 12)
43 43 #define T4_IOCTL_GET_CIM_IBQ (T4_IOCTL + 13)
44 44 #define T4_IOCTL_GET_EDC (T4_IOCTL + 14)
45 +#define T4_IOCTL_LOAD_FW (T4_IOCTL + 15)
45 46
46 47 enum {
47 48 T4_CTXT_EGRESS,
48 49 T4_CTXT_INGRESS,
49 50 T4_CTXT_FLM
50 51 };
51 52
52 53 struct t4_reg32_cmd {
53 54 uint32_t reg;
54 55 uint32_t value;
55 56 };
56 57
57 58 #define T4_REGDUMP_SIZE (160 * 1024)
58 59 #define T5_REGDUMP_SIZE (332 * 1024)
59 60 struct t4_regdump {
60 61 uint32_t version;
61 62 uint32_t len;
62 63 uint8_t *data;
63 64 };
64 65
65 66 struct t4_sge_context {
66 67 uint32_t version;
67 68 uint32_t mem_id;
68 69 uint32_t addr;
69 70 uint32_t len;
70 71 uint8_t *data;
71 72 };
72 73
73 74 struct t4_mem_range {
74 75 uint32_t addr;
75 76 uint32_t len;
76 77 uint32_t *data;
77 78 };
78 79
79 80 struct t4_tid_info {
80 81 uint32_t len;
81 82 uint32_t *data;
82 83 };
83 84
84 85 struct t4_mbox {
85 86 uint32_t len;
86 87 uint32_t *data;
87 88 };
88 89
89 90 struct t4_cim_la {
90 91 uint32_t len;
91 92 uint32_t *data;
92 93 };
93 94
94 95 struct t4_ibq {
95 96 uint32_t len;
96 97 uint32_t *data;
97 98 };
98 99
99 100 struct t4_edc {
100 101 uint32_t len;
101 102 uint32_t mem;
102 103 uint32_t pos;
103 104 char *data;
104 105 };
105 106
106 107 struct t4_cim_qcfg {
107 108 uint16_t base[14];
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108 109 uint16_t size[14];
109 110 uint16_t thres[6];
110 111 uint32_t stat[4 * (6 + 8)];
111 112 uint32_t obq_wr[2 * (8)];
112 113 uint32_t num_obq;
113 114 };
114 115
115 116 #define T4_DEVLOG_SIZE 32768
116 117 struct t4_devlog {
117 118 uint32_t len;
118 - uint8_t *data;
119 + uint32_t data[0];
119 120 };
120 121
122 +struct t4_ldfw {
123 + uint32_t len;
124 + uint32_t data[0];
125 +};
126 +
121 127 #ifdef __cplusplus
122 128 }
123 129 #endif
124 130
125 131 #endif /* __T4NEX_H */
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