25 
  26 #ifdef __cplusplus
  27 extern "C" {
  28 #endif
  29 
  30 #define T4_IOCTL                ((('t' << 16) | '4') << 8)
  31 #define T4_IOCTL_PCIGET32       (T4_IOCTL + 1)
  32 #define T4_IOCTL_PCIPUT32       (T4_IOCTL + 2)
  33 #define T4_IOCTL_GET32          (T4_IOCTL + 3)
  34 #define T4_IOCTL_PUT32          (T4_IOCTL + 4)
  35 #define T4_IOCTL_REGDUMP        (T4_IOCTL + 5)
  36 #define T4_IOCTL_SGE_CONTEXT    (T4_IOCTL + 6)
  37 #define T4_IOCTL_DEVLOG         (T4_IOCTL + 7)
  38 #define T4_IOCTL_GET_MEM        (T4_IOCTL + 8)
  39 #define T4_IOCTL_GET_TID_TAB    (T4_IOCTL + 9)
  40 #define T4_IOCTL_GET_MBOX       (T4_IOCTL + 10)
  41 #define T4_IOCTL_GET_CIM_LA     (T4_IOCTL + 11)
  42 #define T4_IOCTL_GET_CIM_QCFG   (T4_IOCTL + 12)
  43 #define T4_IOCTL_GET_CIM_IBQ    (T4_IOCTL + 13)
  44 #define T4_IOCTL_GET_EDC        (T4_IOCTL + 14)

  45 
  46 enum {
  47         T4_CTXT_EGRESS,
  48         T4_CTXT_INGRESS,
  49         T4_CTXT_FLM
  50 };
  51 
  52 struct t4_reg32_cmd {
  53         uint32_t reg;
  54         uint32_t value;
  55 };
  56 
  57 #define T4_REGDUMP_SIZE (160 * 1024)
  58 #define T5_REGDUMP_SIZE (332 * 1024)
  59 struct t4_regdump {
  60         uint32_t  version;
  61         uint32_t  len;
  62         uint8_t   *data;
  63 };
  64 

  98 
  99 struct t4_edc {
 100         uint32_t len;
 101         uint32_t mem;
 102         uint32_t pos;
 103         char *data;
 104 };
 105 
 106 struct t4_cim_qcfg {
 107         uint16_t base[14];
 108         uint16_t size[14];
 109         uint16_t thres[6];
 110         uint32_t stat[4 * (6 + 8)];
 111         uint32_t obq_wr[2 * (8)];
 112         uint32_t num_obq;
 113 };
 114 
 115 #define T4_DEVLOG_SIZE  32768
 116 struct t4_devlog {
 117         uint32_t len;
 118         uint8_t  *data;
 119 };
 120 





 121 #ifdef __cplusplus
 122 }
 123 #endif
 124 
 125 #endif /* __T4NEX_H */

  25 
  26 #ifdef __cplusplus
  27 extern "C" {
  28 #endif
  29 
  30 #define T4_IOCTL                ((('t' << 16) | '4') << 8)
  31 #define T4_IOCTL_PCIGET32       (T4_IOCTL + 1)
  32 #define T4_IOCTL_PCIPUT32       (T4_IOCTL + 2)
  33 #define T4_IOCTL_GET32          (T4_IOCTL + 3)
  34 #define T4_IOCTL_PUT32          (T4_IOCTL + 4)
  35 #define T4_IOCTL_REGDUMP        (T4_IOCTL + 5)
  36 #define T4_IOCTL_SGE_CONTEXT    (T4_IOCTL + 6)
  37 #define T4_IOCTL_DEVLOG         (T4_IOCTL + 7)
  38 #define T4_IOCTL_GET_MEM        (T4_IOCTL + 8)
  39 #define T4_IOCTL_GET_TID_TAB    (T4_IOCTL + 9)
  40 #define T4_IOCTL_GET_MBOX       (T4_IOCTL + 10)
  41 #define T4_IOCTL_GET_CIM_LA     (T4_IOCTL + 11)
  42 #define T4_IOCTL_GET_CIM_QCFG   (T4_IOCTL + 12)
  43 #define T4_IOCTL_GET_CIM_IBQ    (T4_IOCTL + 13)
  44 #define T4_IOCTL_GET_EDC        (T4_IOCTL + 14)
  45 #define T4_IOCTL_LOAD_FW        (T4_IOCTL + 15)
  46 
  47 enum {
  48         T4_CTXT_EGRESS,
  49         T4_CTXT_INGRESS,
  50         T4_CTXT_FLM
  51 };
  52 
  53 struct t4_reg32_cmd {
  54         uint32_t reg;
  55         uint32_t value;
  56 };
  57 
  58 #define T4_REGDUMP_SIZE (160 * 1024)
  59 #define T5_REGDUMP_SIZE (332 * 1024)
  60 struct t4_regdump {
  61         uint32_t  version;
  62         uint32_t  len;
  63         uint8_t   *data;
  64 };
  65 

  99 
 100 struct t4_edc {
 101         uint32_t len;
 102         uint32_t mem;
 103         uint32_t pos;
 104         char *data;
 105 };
 106 
 107 struct t4_cim_qcfg {
 108         uint16_t base[14];
 109         uint16_t size[14];
 110         uint16_t thres[6];
 111         uint32_t stat[4 * (6 + 8)];
 112         uint32_t obq_wr[2 * (8)];
 113         uint32_t num_obq;
 114 };
 115 
 116 #define T4_DEVLOG_SIZE  32768
 117 struct t4_devlog {
 118         uint32_t len;
 119         uint32_t data[0];
 120 };
 121 
 122 struct t4_ldfw {
 123         uint32_t len;
 124         uint32_t data[0];
 125 };
 126 
 127 #ifdef __cplusplus
 128 }
 129 #endif
 130 
 131 #endif /* __T4NEX_H */