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13230 i40e has duplicate traffic when used with bhyve/snoop running
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--- old/usr/src/uts/common/io/i40e/i40e_gld.c
+++ new/usr/src/uts/common/io/i40e/i40e_gld.c
1 1 /*
2 2 * This file and its contents are supplied under the terms of the
3 3 * Common Development and Distribution License ("CDDL"), version 1.0.
4 4 * You may only use this file in accordance with the terms of version
5 5 * 1.0 of the CDDL.
6 6 *
7 7 * A full copy of the text of the CDDL should have accompanied this
8 8 * source. A copy of the CDDL is also available via the Internet at
9 9 * http://www.illumos.org/license/CDDL.
10 10 */
11 11
12 12 /*
13 13 * Copyright 2015 OmniTI Computer Consulting, Inc. All rights reserved.
14 14 * Copyright (c) 2018, Joyent, Inc.
15 15 * Copyright 2017 Tegile Systems, Inc. All rights reserved.
16 16 * Copyright 2020 Ryan Zezeski
17 17 * Copyright 2020 RackTop Systems, Inc.
18 18 * Copyright 2021 Oxide Computer Company
19 19 */
20 20
21 21 /*
22 22 * For more information, please see the big theory statement in i40e_main.c.
23 23 */
24 24
25 25 #include "i40e_sw.h"
26 26
27 27 #define I40E_PROP_RX_DMA_THRESH "_rx_dma_threshold"
28 28 #define I40E_PROP_TX_DMA_THRESH "_tx_dma_threshold"
29 29 #define I40E_PROP_RX_ITR "_rx_intr_throttle"
30 30 #define I40E_PROP_TX_ITR "_tx_intr_throttle"
31 31 #define I40E_PROP_OTHER_ITR "_other_intr_throttle"
32 32
33 33 char *i40e_priv_props[] = {
34 34 I40E_PROP_RX_DMA_THRESH,
35 35 I40E_PROP_TX_DMA_THRESH,
36 36 I40E_PROP_RX_ITR,
37 37 I40E_PROP_TX_ITR,
38 38 I40E_PROP_OTHER_ITR,
39 39 NULL
40 40 };
41 41
42 42 static int
43 43 i40e_group_remove_mac(void *arg, const uint8_t *mac_addr)
44 44 {
45 45 i40e_rx_group_t *rxg = arg;
46 46 i40e_t *i40e = rxg->irg_i40e;
47 47 struct i40e_aqc_remove_macvlan_element_data filt;
48 48 struct i40e_hw *hw = &i40e->i40e_hw_space;
49 49 int ret, i, last;
50 50 i40e_uaddr_t *iua;
51 51
52 52 if (I40E_IS_MULTICAST(mac_addr))
53 53 return (EINVAL);
54 54
55 55 mutex_enter(&i40e->i40e_general_lock);
56 56
57 57 if (i40e->i40e_state & I40E_SUSPENDED) {
58 58 ret = ECANCELED;
59 59 goto done;
60 60 }
61 61
62 62 for (i = 0; i < i40e->i40e_resources.ifr_nmacfilt_used; i++) {
63 63 if (bcmp(mac_addr, i40e->i40e_uaddrs[i].iua_mac,
64 64 ETHERADDRL) == 0)
65 65 break;
66 66 }
67 67
68 68 if (i == i40e->i40e_resources.ifr_nmacfilt_used) {
69 69 ret = ENOENT;
70 70 goto done;
71 71 }
72 72
73 73 iua = &i40e->i40e_uaddrs[i];
74 74 ASSERT(i40e->i40e_resources.ifr_nmacfilt_used > 0);
75 75
76 76 bzero(&filt, sizeof (filt));
77 77 bcopy(mac_addr, filt.mac_addr, ETHERADDRL);
78 78 filt.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
79 79 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
80 80
81 81 if (i40e_aq_remove_macvlan(hw, iua->iua_vsi, &filt, 1, NULL) !=
82 82 I40E_SUCCESS) {
83 83 i40e_error(i40e, "failed to remove mac address "
84 84 "%2x:%2x:%2x:%2x:%2x:%2x from unicast filter: %d",
85 85 mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3],
86 86 mac_addr[4], mac_addr[5], filt.error_code);
87 87 ret = EIO;
88 88 goto done;
89 89 }
90 90
91 91 last = i40e->i40e_resources.ifr_nmacfilt_used - 1;
92 92 if (i != last) {
93 93 i40e_uaddr_t *src = &i40e->i40e_uaddrs[last];
94 94 bcopy(src, iua, sizeof (i40e_uaddr_t));
95 95 }
96 96
97 97 /*
98 98 * Set the multicast bit in the last one to indicate to ourselves that
99 99 * it's invalid.
100 100 */
101 101 bzero(&i40e->i40e_uaddrs[last], sizeof (i40e_uaddr_t));
102 102 i40e->i40e_uaddrs[last].iua_mac[0] = 0x01;
103 103 i40e->i40e_resources.ifr_nmacfilt_used--;
104 104 ret = 0;
105 105 done:
106 106 mutex_exit(&i40e->i40e_general_lock);
107 107
108 108 return (ret);
109 109 }
110 110
111 111 static int
112 112 i40e_group_add_mac(void *arg, const uint8_t *mac_addr)
113 113 {
114 114 i40e_rx_group_t *rxg = arg;
115 115 i40e_t *i40e = rxg->irg_i40e;
116 116 struct i40e_hw *hw = &i40e->i40e_hw_space;
117 117 int i, ret;
118 118 i40e_uaddr_t *iua;
119 119 struct i40e_aqc_add_macvlan_element_data filt;
120 120
121 121 if (I40E_IS_MULTICAST(mac_addr))
122 122 return (EINVAL);
123 123
124 124 mutex_enter(&i40e->i40e_general_lock);
125 125 if (i40e->i40e_state & I40E_SUSPENDED) {
126 126 ret = ECANCELED;
127 127 goto done;
128 128 }
129 129
130 130 if (i40e->i40e_resources.ifr_nmacfilt ==
131 131 i40e->i40e_resources.ifr_nmacfilt_used) {
132 132 ret = ENOSPC;
133 133 goto done;
134 134 }
135 135
136 136 for (i = 0; i < i40e->i40e_resources.ifr_nmacfilt_used; i++) {
137 137 if (bcmp(mac_addr, i40e->i40e_uaddrs[i].iua_mac,
138 138 ETHERADDRL) == 0) {
139 139 ret = EEXIST;
140 140 goto done;
141 141 }
142 142 }
143 143
144 144 bzero(&filt, sizeof (filt));
145 145 bcopy(mac_addr, filt.mac_addr, ETHERADDRL);
146 146 filt.flags = I40E_AQC_MACVLAN_ADD_PERFECT_MATCH |
147 147 I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
148 148
149 149 if ((ret = i40e_aq_add_macvlan(hw, rxg->irg_vsi_seid, &filt, 1,
150 150 NULL)) != I40E_SUCCESS) {
151 151 i40e_error(i40e, "failed to add mac address "
152 152 "%2x:%2x:%2x:%2x:%2x:%2x to unicast filter: %d",
153 153 mac_addr[0], mac_addr[1], mac_addr[2], mac_addr[3],
154 154 mac_addr[4], mac_addr[5], ret);
155 155 ret = EIO;
156 156 goto done;
157 157 }
158 158
159 159 iua = &i40e->i40e_uaddrs[i40e->i40e_resources.ifr_nmacfilt_used];
160 160 bcopy(mac_addr, iua->iua_mac, ETHERADDRL);
161 161 iua->iua_vsi = rxg->irg_vsi_seid;
162 162 i40e->i40e_resources.ifr_nmacfilt_used++;
163 163 ASSERT(i40e->i40e_resources.ifr_nmacfilt_used <=
164 164 i40e->i40e_resources.ifr_nmacfilt);
165 165 ret = 0;
166 166 done:
167 167 mutex_exit(&i40e->i40e_general_lock);
168 168 return (ret);
169 169 }
170 170
171 171 static int
172 172 i40e_m_start(void *arg)
173 173 {
174 174 i40e_t *i40e = arg;
175 175 int rc = 0;
176 176
177 177 mutex_enter(&i40e->i40e_general_lock);
178 178 if (i40e->i40e_state & I40E_SUSPENDED) {
179 179 rc = ECANCELED;
180 180 goto done;
181 181 }
182 182
183 183 if (!i40e_start(i40e)) {
184 184 rc = EIO;
185 185 goto done;
186 186 }
187 187
188 188 atomic_or_32(&i40e->i40e_state, I40E_STARTED);
189 189 done:
190 190 mutex_exit(&i40e->i40e_general_lock);
191 191
192 192 return (rc);
193 193 }
194 194
195 195 static void
196 196 i40e_m_stop(void *arg)
197 197 {
198 198 i40e_t *i40e = arg;
199 199
200 200 mutex_enter(&i40e->i40e_general_lock);
201 201
202 202 if (i40e->i40e_state & I40E_SUSPENDED)
203 203 goto done;
204 204
205 205 atomic_and_32(&i40e->i40e_state, ~I40E_STARTED);
206 206 i40e_stop(i40e);
207 207 done:
208 208 mutex_exit(&i40e->i40e_general_lock);
209 209 }
210 210
211 211 /*
212 212 * Enable and disable promiscuous mode as requested. We have to toggle both
213 213 * unicast and multicast. Note that multicast may already be enabled due to the
214 214 * i40e_m_multicast may toggle it itself. See i40e_main.c for more information
215 215 * on this.
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216 216 */
217 217 static int
218 218 i40e_m_promisc(void *arg, boolean_t on)
219 219 {
220 220 i40e_t *i40e = arg;
221 221 struct i40e_hw *hw = &i40e->i40e_hw_space;
222 222 int ret = 0, err = 0;
223 223
224 224 mutex_enter(&i40e->i40e_general_lock);
225 225 if (i40e->i40e_state & I40E_SUSPENDED) {
226 - ret = ECANCELED;
226 + err = ECANCELED;
227 227 goto done;
228 228 }
229 229
230 230
231 231 ret = i40e_aq_set_vsi_unicast_promiscuous(hw, I40E_DEF_VSI_SEID(i40e),
232 - on, NULL, B_FALSE);
232 + on, NULL, B_TRUE);
233 233 if (ret != I40E_SUCCESS) {
234 234 i40e_error(i40e, "failed to %s unicast promiscuity on "
235 235 "the default VSI: %d", on == B_TRUE ? "enable" : "disable",
236 236 ret);
237 237 err = EIO;
238 238 goto done;
239 239 }
240 240
241 241 /*
242 242 * If we have a non-zero mcast_promisc_count, then it has already been
243 243 * enabled or we need to leave it that way and not touch it.
244 244 */
245 245 if (i40e->i40e_mcast_promisc_count > 0) {
246 246 i40e->i40e_promisc_on = on;
247 247 goto done;
248 248 }
249 249
250 250 ret = i40e_aq_set_vsi_multicast_promiscuous(hw, I40E_DEF_VSI_SEID(i40e),
251 251 on, NULL);
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252 252 if (ret != I40E_SUCCESS) {
253 253 i40e_error(i40e, "failed to %s multicast promiscuity on "
254 254 "the default VSI: %d", on == B_TRUE ? "enable" : "disable",
255 255 ret);
256 256
257 257 /*
258 258 * Try our best to put us back into a state that MAC expects us
259 259 * to be in.
260 260 */
261 261 ret = i40e_aq_set_vsi_unicast_promiscuous(hw,
262 - I40E_DEF_VSI_SEID(i40e), !on, NULL, B_FALSE);
262 + I40E_DEF_VSI_SEID(i40e), !on, NULL, B_TRUE);
263 263 if (ret != I40E_SUCCESS) {
264 264 i40e_error(i40e, "failed to %s unicast promiscuity on "
265 265 "the default VSI after toggling multicast failed: "
266 266 "%d", on == B_TRUE ? "disable" : "enable", ret);
267 267 }
268 268
269 269 err = EIO;
270 270 goto done;
271 271 } else {
272 272 i40e->i40e_promisc_on = on;
273 273 }
274 274
275 275 done:
276 276 mutex_exit(&i40e->i40e_general_lock);
277 277 return (err);
278 278 }
279 279
280 280 /*
281 281 * See the big theory statement in i40e_main.c for multicast address management.
282 282 */
283 283 static int
284 284 i40e_multicast_add(i40e_t *i40e, const uint8_t *multicast_address)
285 285 {
286 286 struct i40e_hw *hw = &i40e->i40e_hw_space;
287 287 struct i40e_aqc_add_macvlan_element_data filt;
288 288 i40e_maddr_t *mc;
289 289 int ret;
290 290
291 291 ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
292 292
293 293 if (i40e->i40e_resources.ifr_nmcastfilt_used ==
294 294 i40e->i40e_resources.ifr_nmcastfilt) {
295 295 if (i40e->i40e_mcast_promisc_count == 0 &&
296 296 i40e->i40e_promisc_on == B_FALSE) {
297 297 ret = i40e_aq_set_vsi_multicast_promiscuous(hw,
298 298 I40E_DEF_VSI_SEID(i40e), B_TRUE, NULL);
299 299 if (ret != I40E_SUCCESS) {
300 300 i40e_error(i40e, "failed to enable multicast "
301 301 "promiscuous mode on VSI %d: %d",
302 302 I40E_DEF_VSI_SEID(i40e), ret);
303 303 return (EIO);
304 304 }
305 305 }
306 306 i40e->i40e_mcast_promisc_count++;
307 307 return (0);
308 308 }
309 309
310 310 mc = &i40e->i40e_maddrs[i40e->i40e_resources.ifr_nmcastfilt_used];
311 311 bzero(&filt, sizeof (filt));
312 312 bcopy(multicast_address, filt.mac_addr, ETHERADDRL);
313 313 filt.flags = I40E_AQC_MACVLAN_ADD_HASH_MATCH |
314 314 I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
315 315
316 316 if ((ret = i40e_aq_add_macvlan(hw, I40E_DEF_VSI_SEID(i40e), &filt, 1,
317 317 NULL)) != I40E_SUCCESS) {
318 318 i40e_error(i40e, "failed to add mac address "
319 319 "%2x:%2x:%2x:%2x:%2x:%2x to multicast filter: %d",
320 320 multicast_address[0], multicast_address[1],
321 321 multicast_address[2], multicast_address[3],
322 322 multicast_address[4], multicast_address[5],
323 323 ret);
324 324 return (EIO);
325 325 }
326 326
327 327 bcopy(multicast_address, mc->ima_mac, ETHERADDRL);
328 328 i40e->i40e_resources.ifr_nmcastfilt_used++;
329 329 return (0);
330 330 }
331 331
332 332 /*
333 333 * See the big theory statement in i40e_main.c for multicast address management.
334 334 */
335 335 static int
336 336 i40e_multicast_remove(i40e_t *i40e, const uint8_t *multicast_address)
337 337 {
338 338 int i, ret;
339 339 struct i40e_hw *hw = &i40e->i40e_hw_space;
340 340
341 341 ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
342 342
343 343 for (i = 0; i < i40e->i40e_resources.ifr_nmcastfilt_used; i++) {
344 344 struct i40e_aqc_remove_macvlan_element_data filt;
345 345 int last;
346 346
347 347 if (bcmp(multicast_address, i40e->i40e_maddrs[i].ima_mac,
348 348 ETHERADDRL) != 0) {
349 349 continue;
350 350 }
351 351
352 352 bzero(&filt, sizeof (filt));
353 353 bcopy(multicast_address, filt.mac_addr, ETHERADDRL);
354 354 filt.flags = I40E_AQC_MACVLAN_DEL_HASH_MATCH |
355 355 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
356 356
357 357 if (i40e_aq_remove_macvlan(hw, I40E_DEF_VSI_SEID(i40e), &filt,
358 358 1, NULL) != I40E_SUCCESS) {
359 359 i40e_error(i40e, "failed to remove mac address "
360 360 "%2x:%2x:%2x:%2x:%2x:%2x from multicast "
361 361 "filter: %d",
362 362 multicast_address[0], multicast_address[1],
363 363 multicast_address[2], multicast_address[3],
364 364 multicast_address[4], multicast_address[5],
365 365 filt.error_code);
366 366 return (EIO);
367 367 }
368 368
369 369 last = i40e->i40e_resources.ifr_nmcastfilt_used - 1;
370 370 if (i != last) {
371 371 bcopy(&i40e->i40e_maddrs[last], &i40e->i40e_maddrs[i],
372 372 sizeof (i40e_maddr_t));
373 373 bzero(&i40e->i40e_maddrs[last], sizeof (i40e_maddr_t));
374 374 }
375 375
376 376 ASSERT(i40e->i40e_resources.ifr_nmcastfilt_used > 0);
377 377 i40e->i40e_resources.ifr_nmcastfilt_used--;
378 378 return (0);
379 379 }
380 380
381 381 if (i40e->i40e_mcast_promisc_count > 0) {
382 382 if (i40e->i40e_mcast_promisc_count == 1 &&
383 383 i40e->i40e_promisc_on == B_FALSE) {
384 384 ret = i40e_aq_set_vsi_multicast_promiscuous(hw,
385 385 I40E_DEF_VSI_SEID(i40e), B_FALSE, NULL);
386 386 if (ret != I40E_SUCCESS) {
387 387 i40e_error(i40e, "failed to disable "
388 388 "multicast promiscuous mode on VSI %d: %d",
389 389 I40E_DEF_VSI_SEID(i40e), ret);
390 390 return (EIO);
391 391 }
392 392 }
393 393 i40e->i40e_mcast_promisc_count--;
394 394
395 395 return (0);
396 396 }
397 397
398 398 return (ENOENT);
399 399 }
400 400
401 401 static int
402 402 i40e_m_multicast(void *arg, boolean_t add, const uint8_t *multicast_address)
403 403 {
404 404 i40e_t *i40e = arg;
405 405 int rc;
406 406
407 407 mutex_enter(&i40e->i40e_general_lock);
408 408
409 409 if (i40e->i40e_state & I40E_SUSPENDED) {
410 410 mutex_exit(&i40e->i40e_general_lock);
411 411 return (ECANCELED);
412 412 }
413 413
414 414 if (add == B_TRUE) {
415 415 rc = i40e_multicast_add(i40e, multicast_address);
416 416 } else {
417 417 rc = i40e_multicast_remove(i40e, multicast_address);
418 418 }
419 419
420 420 mutex_exit(&i40e->i40e_general_lock);
421 421 return (rc);
422 422 }
423 423
424 424 /* ARGSUSED */
425 425 static void
426 426 i40e_m_ioctl(void *arg, queue_t *q, mblk_t *mp)
427 427 {
428 428 /*
429 429 * At this time, we don't support toggling i40e into loopback mode. It's
430 430 * questionable how much value this has when there's no clear way to
431 431 * toggle this behavior from a supported way in userland.
432 432 */
433 433 miocnak(q, mp, 0, EINVAL);
434 434 }
435 435
436 436 static int
437 437 i40e_ring_start(mac_ring_driver_t rh, uint64_t gen_num)
438 438 {
439 439 i40e_trqpair_t *itrq = (i40e_trqpair_t *)rh;
440 440 int rv;
441 441
442 442 if ((rv = i40e_setup_ring(itrq)) != 0)
443 443 return (rv);
444 444
445 445 /*
446 446 * GLDv3 requires we keep track of a generation number, as it uses
447 447 * that number to keep track of whether or not a ring is active.
448 448 */
449 449 mutex_enter(&itrq->itrq_rx_lock);
450 450 itrq->itrq_rxgen = gen_num;
451 451 mutex_exit(&itrq->itrq_rx_lock);
452 452 return (0);
453 453 }
454 454
455 455 static void
456 456 i40e_ring_stop(mac_ring_driver_t rh)
457 457 {
458 458 i40e_trqpair_t *itrq = (i40e_trqpair_t *)rh;
459 459
460 460 if (!i40e_shutdown_ring(itrq)) {
461 461 i40e_t *i40e = itrq->itrq_i40e;
462 462
463 463 ddi_fm_service_impact(i40e->i40e_dip, DDI_SERVICE_LOST);
464 464 i40e_error(i40e, "Failed to stop ring %u", itrq->itrq_index);
465 465 }
466 466 }
467 467
468 468 /* ARGSUSED */
469 469 static int
470 470 i40e_rx_ring_intr_enable(mac_intr_handle_t intrh)
471 471 {
472 472 i40e_trqpair_t *itrq = (i40e_trqpair_t *)intrh;
473 473
474 474 mutex_enter(&itrq->itrq_rx_lock);
475 475 ASSERT(itrq->itrq_intr_poll == B_TRUE);
476 476 i40e_intr_rx_queue_enable(itrq);
477 477 itrq->itrq_intr_poll = B_FALSE;
478 478 mutex_exit(&itrq->itrq_rx_lock);
479 479
480 480 return (0);
481 481 }
482 482
483 483 /* ARGSUSED */
484 484 static int
485 485 i40e_rx_ring_intr_disable(mac_intr_handle_t intrh)
486 486 {
487 487 i40e_trqpair_t *itrq = (i40e_trqpair_t *)intrh;
488 488
489 489 mutex_enter(&itrq->itrq_rx_lock);
490 490 i40e_intr_rx_queue_disable(itrq);
491 491 itrq->itrq_intr_poll = B_TRUE;
492 492 mutex_exit(&itrq->itrq_rx_lock);
493 493
494 494 return (0);
495 495 }
496 496
497 497 /* ARGSUSED */
498 498 static void
499 499 i40e_fill_tx_ring(void *arg, mac_ring_type_t rtype, const int group_index,
500 500 const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh)
501 501 {
502 502 i40e_t *i40e = arg;
503 503 mac_intr_t *mintr = &infop->mri_intr;
504 504 i40e_trqpair_t *itrq = &(i40e->i40e_trqpairs[ring_index]);
505 505
506 506 /*
507 507 * Note the group index here is expected to be -1 due to the fact that
508 508 * we're not actually grouping things tx-wise at this time.
509 509 */
510 510 ASSERT(group_index == -1);
511 511 ASSERT(ring_index < i40e->i40e_num_trqpairs_per_vsi);
512 512
513 513 itrq->itrq_mactxring = rh;
514 514 infop->mri_driver = (mac_ring_driver_t)itrq;
515 515 infop->mri_start = NULL;
516 516 infop->mri_stop = NULL;
517 517 infop->mri_tx = i40e_ring_tx;
518 518 infop->mri_stat = i40e_tx_ring_stat;
519 519
520 520 /*
521 521 * We only provide the handle in cases where we have MSI-X interrupts,
522 522 * to indicate that we'd actually support retargetting.
523 523 */
524 524 if (i40e->i40e_intr_type & DDI_INTR_TYPE_MSIX) {
525 525 mintr->mi_ddi_handle =
526 526 i40e->i40e_intr_handles[itrq->itrq_tx_intrvec];
527 527 }
528 528 }
529 529
530 530 /* ARGSUSED */
531 531 static void
532 532 i40e_fill_rx_ring(void *arg, mac_ring_type_t rtype, const int group_index,
533 533 const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh)
534 534 {
535 535 i40e_t *i40e = arg;
536 536 mac_intr_t *mintr = &infop->mri_intr;
537 537 uint_t trqpair_index;
538 538 i40e_trqpair_t *itrq;
539 539
540 540 /* This assumes static groups. */
541 541 ASSERT3S(group_index, >=, 0);
542 542 ASSERT3S(ring_index, >=, 0);
543 543 trqpair_index = (group_index * i40e->i40e_num_trqpairs_per_vsi) +
544 544 ring_index;
545 545 ASSERT3U(trqpair_index, <, i40e->i40e_num_trqpairs);
546 546 itrq = &i40e->i40e_trqpairs[trqpair_index];
547 547
548 548 itrq->itrq_macrxring = rh;
549 549 infop->mri_driver = (mac_ring_driver_t)itrq;
550 550 infop->mri_start = i40e_ring_start;
551 551 infop->mri_stop = i40e_ring_stop;
552 552 infop->mri_poll = i40e_ring_rx_poll;
553 553 infop->mri_stat = i40e_rx_ring_stat;
554 554 mintr->mi_handle = (mac_intr_handle_t)itrq;
555 555 mintr->mi_enable = i40e_rx_ring_intr_enable;
556 556 mintr->mi_disable = i40e_rx_ring_intr_disable;
557 557
558 558 /*
559 559 * We only provide the handle in cases where we have MSI-X interrupts,
560 560 * to indicate that we'd actually support retargetting.
561 561 */
562 562 if (i40e->i40e_intr_type & DDI_INTR_TYPE_MSIX) {
563 563 mintr->mi_ddi_handle =
564 564 i40e->i40e_intr_handles[itrq->itrq_rx_intrvec];
565 565 }
566 566 }
567 567
568 568 /* ARGSUSED */
569 569 static void
570 570 i40e_fill_rx_group(void *arg, mac_ring_type_t rtype, const int index,
571 571 mac_group_info_t *infop, mac_group_handle_t gh)
572 572 {
573 573 i40e_t *i40e = arg;
574 574 i40e_rx_group_t *rxg;
575 575
576 576 if (rtype != MAC_RING_TYPE_RX)
577 577 return;
578 578
579 579 rxg = &i40e->i40e_rx_groups[index];
580 580 rxg->irg_grp_hdl = gh;
581 581
582 582 infop->mgi_driver = (mac_group_driver_t)rxg;
583 583 infop->mgi_start = NULL;
584 584 infop->mgi_stop = NULL;
585 585 infop->mgi_addmac = i40e_group_add_mac;
586 586 infop->mgi_remmac = i40e_group_remove_mac;
587 587
588 588 ASSERT3U(i40e->i40e_num_rx_groups, <=, I40E_MAX_NUM_RX_GROUPS);
589 589 infop->mgi_count = i40e->i40e_num_trqpairs_per_vsi;
590 590 }
591 591
592 592 static int
593 593 i40e_transceiver_info(void *arg, uint_t id, mac_transceiver_info_t *infop)
594 594 {
595 595 boolean_t present, usable;
596 596 i40e_t *i40e = arg;
597 597
598 598 if (id != 0 || infop == NULL)
599 599 return (EINVAL);
600 600
601 601 mutex_enter(&i40e->i40e_general_lock);
602 602 switch (i40e->i40e_hw_space.phy.link_info.module_type[0]) {
603 603 case I40E_MODULE_TYPE_SFP:
604 604 case I40E_MODULE_TYPE_QSFP:
605 605 break;
606 606 default:
607 607 mutex_exit(&i40e->i40e_general_lock);
608 608 return (ENOTSUP);
609 609 }
610 610
611 611 present = !!(i40e->i40e_hw_space.phy.link_info.link_info &
612 612 I40E_AQ_MEDIA_AVAILABLE);
613 613 if (present) {
614 614 usable = !!(i40e->i40e_hw_space.phy.link_info.an_info &
615 615 I40E_AQ_QUALIFIED_MODULE);
616 616 } else {
617 617 usable = B_FALSE;
618 618 }
619 619 mutex_exit(&i40e->i40e_general_lock);
620 620
621 621 mac_transceiver_info_set_usable(infop, usable);
622 622 mac_transceiver_info_set_present(infop, present);
623 623
624 624 return (0);
625 625 }
626 626
627 627 static int
628 628 i40e_transceiver_read(void *arg, uint_t id, uint_t page, void *buf,
629 629 size_t nbytes, off_t offset, size_t *nread)
630 630 {
631 631 i40e_t *i40e = arg;
632 632 struct i40e_hw *hw = &i40e->i40e_hw_space;
633 633 uint8_t *buf8 = buf;
634 634 size_t i;
635 635
636 636 if (id != 0 || buf == NULL || nbytes == 0 || nread == NULL ||
637 637 (page != 0xa0 && page != 0xa2) || offset < 0)
638 638 return (EINVAL);
639 639
640 640 /*
641 641 * Both supported pages have a length of 256 bytes, ensure nothing asks
642 642 * us to go beyond that.
643 643 */
644 644 if (nbytes > 256 || offset >= 256 || (offset + nbytes > 256)) {
645 645 return (EINVAL);
646 646 }
647 647
648 648 mutex_enter(&i40e->i40e_general_lock);
649 649 switch (i40e->i40e_hw_space.phy.link_info.module_type[0]) {
650 650 case I40E_MODULE_TYPE_SFP:
651 651 case I40E_MODULE_TYPE_QSFP:
652 652 break;
653 653 default:
654 654 mutex_exit(&i40e->i40e_general_lock);
655 655 return (ENOTSUP);
656 656 }
657 657
658 658 /*
659 659 * Make sure we have a sufficiently new firmware version to run this
660 660 * command. This was introduced in firmware API 1.7. This is apparently
661 661 * only supported on the XL710 MAC, not the XL722.
662 662 */
663 663 if (hw->mac.type != I40E_MAC_XL710 || hw->aq.api_maj_ver != 1 ||
664 664 hw->aq.api_min_ver < 7) {
665 665 mutex_exit(&i40e->i40e_general_lock);
666 666 return (ENOTSUP);
667 667 }
668 668
669 669 for (i = 0; i < nbytes; i++, offset++) {
670 670 enum i40e_status_code status;
671 671 uint32_t val;
672 672
673 673 status = i40e_aq_get_phy_register(hw,
674 674 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE, page, TRUE, offset,
675 675 &val, NULL);
676 676 if (status != I40E_SUCCESS) {
677 677 mutex_exit(&i40e->i40e_general_lock);
678 678 return (EIO);
679 679 }
680 680
681 681 buf8[i] = (uint8_t)val;
682 682 }
683 683
684 684 mutex_exit(&i40e->i40e_general_lock);
685 685 *nread = nbytes;
686 686
687 687 return (0);
688 688 }
689 689
690 690 static int
691 691 i40e_gld_led_set(void *arg, mac_led_mode_t mode, uint_t flags)
692 692 {
693 693 i40e_t *i40e = arg;
694 694 struct i40e_hw *hw = &i40e->i40e_hw_space;
695 695
696 696 if (flags != 0)
697 697 return (EINVAL);
698 698
699 699 if (mode != MAC_LED_DEFAULT &&
700 700 mode != MAC_LED_IDENT &&
701 701 mode != MAC_LED_OFF &&
702 702 mode != MAC_LED_ON)
703 703 return (ENOTSUP);
704 704
705 705 if (mode != MAC_LED_DEFAULT && !i40e->i40e_led_saved) {
706 706 i40e->i40e_led_status = i40e_led_get(hw);
707 707 i40e->i40e_led_saved = B_TRUE;
708 708 }
709 709
710 710 switch (mode) {
711 711 case MAC_LED_DEFAULT:
712 712 if (i40e->i40e_led_saved) {
713 713 i40e_led_set(hw, i40e->i40e_led_status, B_FALSE);
714 714 i40e->i40e_led_status = 0;
715 715 i40e->i40e_led_saved = B_FALSE;
716 716 }
717 717 break;
718 718 case MAC_LED_IDENT:
719 719 i40e_led_set(hw, 0xf, B_TRUE);
720 720 break;
721 721 case MAC_LED_OFF:
722 722 i40e_led_set(hw, 0x0, B_FALSE);
723 723 break;
724 724 case MAC_LED_ON:
725 725 i40e_led_set(hw, 0xf, B_FALSE);
726 726 break;
727 727 default:
728 728 return (ENOTSUP);
729 729 }
730 730
731 731 return (0);
732 732 }
733 733
734 734 static boolean_t
735 735 i40e_m_getcapab(void *arg, mac_capab_t cap, void *cap_data)
736 736 {
737 737 i40e_t *i40e = arg;
738 738 mac_capab_rings_t *cap_rings;
739 739 mac_capab_transceiver_t *mct;
740 740 mac_capab_led_t *mcl;
741 741
742 742 switch (cap) {
743 743 case MAC_CAPAB_HCKSUM: {
744 744 uint32_t *txflags = cap_data;
745 745
746 746 *txflags = 0;
747 747 if (i40e->i40e_tx_hcksum_enable == B_TRUE)
748 748 *txflags = HCKSUM_INET_PARTIAL | HCKSUM_IPHDRCKSUM;
749 749 break;
750 750 }
751 751
752 752 case MAC_CAPAB_LSO: {
753 753 mac_capab_lso_t *cap_lso = cap_data;
754 754
755 755 if (i40e->i40e_tx_lso_enable == B_TRUE) {
756 756 cap_lso->lso_flags = LSO_TX_BASIC_TCP_IPV4 |
757 757 LSO_TX_BASIC_TCP_IPV6;
758 758 cap_lso->lso_basic_tcp_ipv4.lso_max = I40E_LSO_MAXLEN;
759 759 cap_lso->lso_basic_tcp_ipv6.lso_max = I40E_LSO_MAXLEN;
760 760 } else {
761 761 return (B_FALSE);
762 762 }
763 763 break;
764 764 }
765 765
766 766 case MAC_CAPAB_RINGS:
767 767 cap_rings = cap_data;
768 768 cap_rings->mr_group_type = MAC_GROUP_TYPE_STATIC;
769 769 switch (cap_rings->mr_type) {
770 770 case MAC_RING_TYPE_TX:
771 771 /*
772 772 * Note, saying we have no groups, but some
773 773 * number of rings indicates to MAC that it
774 774 * should create psuedo-groups with one for
775 775 * each TX ring. This may not be the long term
776 776 * behavior we want, but it'll work for now.
777 777 */
778 778 cap_rings->mr_gnum = 0;
779 779 cap_rings->mr_rnum = i40e->i40e_num_trqpairs_per_vsi;
780 780 cap_rings->mr_rget = i40e_fill_tx_ring;
781 781 cap_rings->mr_gget = NULL;
782 782 cap_rings->mr_gaddring = NULL;
783 783 cap_rings->mr_gremring = NULL;
784 784 break;
785 785 case MAC_RING_TYPE_RX:
786 786 cap_rings->mr_rnum = i40e->i40e_num_trqpairs;
787 787 cap_rings->mr_rget = i40e_fill_rx_ring;
788 788 cap_rings->mr_gnum = i40e->i40e_num_rx_groups;
789 789 cap_rings->mr_gget = i40e_fill_rx_group;
790 790 cap_rings->mr_gaddring = NULL;
791 791 cap_rings->mr_gremring = NULL;
792 792 break;
793 793 default:
794 794 return (B_FALSE);
795 795 }
796 796 break;
797 797 case MAC_CAPAB_TRANSCEIVER:
798 798 mct = cap_data;
799 799
800 800 /*
801 801 * Firmware doesn't have a great way of telling us in advance
802 802 * whether we'd expect a SFF transceiver. As such, we always
803 803 * advertise the support for this capability.
804 804 */
805 805 mct->mct_flags = 0;
806 806 mct->mct_ntransceivers = 1;
807 807 mct->mct_info = i40e_transceiver_info;
808 808 mct->mct_read = i40e_transceiver_read;
809 809
810 810 return (B_TRUE);
811 811 case MAC_CAPAB_LED:
812 812 mcl = cap_data;
813 813
814 814 mcl->mcl_flags = 0;
815 815 mcl->mcl_modes = MAC_LED_DEFAULT | MAC_LED_IDENT | MAC_LED_OFF |
816 816 MAC_LED_ON;
817 817 mcl->mcl_set = i40e_gld_led_set;
818 818 break;
819 819
820 820 default:
821 821 return (B_FALSE);
822 822 }
823 823
824 824 return (B_TRUE);
825 825 }
826 826
827 827 /* ARGSUSED */
828 828 static int
829 829 i40e_m_setprop_private(i40e_t *i40e, const char *pr_name, uint_t pr_valsize,
830 830 const void *pr_val)
831 831 {
832 832 int ret;
833 833 long val;
834 834 char *eptr;
835 835
836 836 ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
837 837
838 838 if ((ret = ddi_strtol(pr_val, &eptr, 10, &val)) != 0 ||
839 839 *eptr != '\0') {
840 840 return (ret);
841 841 }
842 842
843 843 if (strcmp(pr_name, I40E_PROP_RX_DMA_THRESH) == 0) {
844 844 if (val < I40E_MIN_RX_DMA_THRESH ||
845 845 val > I40E_MAX_RX_DMA_THRESH) {
846 846 return (EINVAL);
847 847 }
848 848 i40e->i40e_rx_dma_min = (uint32_t)val;
849 849 return (0);
850 850 }
851 851
852 852 if (strcmp(pr_name, I40E_PROP_TX_DMA_THRESH) == 0) {
853 853 if (val < I40E_MIN_TX_DMA_THRESH ||
854 854 val > I40E_MAX_TX_DMA_THRESH) {
855 855 return (EINVAL);
856 856 }
857 857 i40e->i40e_tx_dma_min = (uint32_t)val;
858 858 return (0);
859 859 }
860 860
861 861 if (strcmp(pr_name, I40E_PROP_RX_ITR) == 0) {
862 862 if (val < I40E_MIN_ITR ||
863 863 val > I40E_MAX_ITR) {
864 864 return (EINVAL);
865 865 }
866 866 i40e->i40e_rx_itr = (uint32_t)val;
867 867 i40e_intr_set_itr(i40e, I40E_ITR_INDEX_RX, i40e->i40e_rx_itr);
868 868 return (0);
869 869 }
870 870
871 871 if (strcmp(pr_name, I40E_PROP_TX_ITR) == 0) {
872 872 if (val < I40E_MIN_ITR ||
873 873 val > I40E_MAX_ITR) {
874 874 return (EINVAL);
875 875 }
876 876 i40e->i40e_tx_itr = (uint32_t)val;
877 877 i40e_intr_set_itr(i40e, I40E_ITR_INDEX_TX, i40e->i40e_tx_itr);
878 878 return (0);
879 879 }
880 880
881 881 if (strcmp(pr_name, I40E_PROP_OTHER_ITR) == 0) {
882 882 if (val < I40E_MIN_ITR ||
883 883 val > I40E_MAX_ITR) {
884 884 return (EINVAL);
885 885 }
886 886 i40e->i40e_tx_itr = (uint32_t)val;
887 887 i40e_intr_set_itr(i40e, I40E_ITR_INDEX_OTHER,
888 888 i40e->i40e_other_itr);
889 889 return (0);
890 890 }
891 891
892 892 return (ENOTSUP);
893 893 }
894 894
895 895 static int
896 896 i40e_m_getprop_private(i40e_t *i40e, const char *pr_name, uint_t pr_valsize,
897 897 void *pr_val)
898 898 {
899 899 uint32_t val;
900 900
901 901 ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
902 902
903 903 if (strcmp(pr_name, I40E_PROP_RX_DMA_THRESH) == 0) {
904 904 val = i40e->i40e_rx_dma_min;
905 905 } else if (strcmp(pr_name, I40E_PROP_TX_DMA_THRESH) == 0) {
906 906 val = i40e->i40e_tx_dma_min;
907 907 } else if (strcmp(pr_name, I40E_PROP_RX_ITR) == 0) {
908 908 val = i40e->i40e_rx_itr;
909 909 } else if (strcmp(pr_name, I40E_PROP_TX_ITR) == 0) {
910 910 val = i40e->i40e_tx_itr;
911 911 } else if (strcmp(pr_name, I40E_PROP_OTHER_ITR) == 0) {
912 912 val = i40e->i40e_other_itr;
913 913 } else {
914 914 return (ENOTSUP);
915 915 }
916 916
917 917 if (snprintf(pr_val, pr_valsize, "%d", val) >= pr_valsize)
918 918 return (ERANGE);
919 919 return (0);
920 920 }
921 921
922 922 /*
923 923 * Annoyingly for private properties MAC seems to ignore default values that
924 924 * aren't strings. That means that we have to translate all of these into
925 925 * uint32_t's and instead we size the buffer to be large enough to hold a
926 926 * uint32_t.
927 927 */
928 928 /* ARGSUSED */
929 929 static void
930 930 i40e_m_propinfo_private(i40e_t *i40e, const char *pr_name,
931 931 mac_prop_info_handle_t prh)
932 932 {
933 933 char buf[64];
934 934 uint32_t def;
935 935
936 936 if (strcmp(pr_name, I40E_PROP_RX_DMA_THRESH) == 0) {
937 937 mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
938 938 def = I40E_DEF_RX_DMA_THRESH;
939 939 mac_prop_info_set_range_uint32(prh,
940 940 I40E_MIN_RX_DMA_THRESH,
941 941 I40E_MAX_RX_DMA_THRESH);
942 942 } else if (strcmp(pr_name, I40E_PROP_TX_DMA_THRESH) == 0) {
943 943 mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
944 944 def = I40E_DEF_TX_DMA_THRESH;
945 945 mac_prop_info_set_range_uint32(prh,
946 946 I40E_MIN_TX_DMA_THRESH,
947 947 I40E_MAX_TX_DMA_THRESH);
948 948 } else if (strcmp(pr_name, I40E_PROP_RX_ITR) == 0) {
949 949 mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
950 950 def = I40E_DEF_RX_ITR;
951 951 mac_prop_info_set_range_uint32(prh, I40E_MIN_ITR, I40E_MAX_ITR);
952 952 } else if (strcmp(pr_name, I40E_PROP_TX_ITR) == 0) {
953 953 mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
954 954 def = I40E_DEF_TX_ITR;
955 955 mac_prop_info_set_range_uint32(prh, I40E_MIN_ITR, I40E_MAX_ITR);
956 956 } else if (strcmp(pr_name, I40E_PROP_OTHER_ITR) == 0) {
957 957 mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
958 958 def = I40E_DEF_OTHER_ITR;
959 959 mac_prop_info_set_range_uint32(prh, I40E_MIN_ITR, I40E_MAX_ITR);
960 960 } else {
961 961 return;
962 962 }
963 963
964 964 (void) snprintf(buf, sizeof (buf), "%d", def);
965 965 mac_prop_info_set_default_str(prh, buf);
966 966 }
967 967
968 968 static int
969 969 i40e_update_fec(i40e_t *i40e, link_fec_t fec)
970 970 {
971 971 struct i40e_hw *hw = &i40e->i40e_hw_space;
972 972 struct i40e_aq_get_phy_abilities_resp abilities;
973 973 struct i40e_aq_set_phy_config config;
974 974 link_fec_t fec_requested;
975 975 int req_fec;
976 976
977 977 ASSERT(MUTEX_HELD(&i40e->i40e_general_lock));
978 978
979 979 if (fec == i40e->i40e_fec_requested)
980 980 return (0);
981 981
982 982 fec_requested = fec;
983 983 if ((fec & LINK_FEC_AUTO) != 0) {
984 984 req_fec = I40E_AQ_SET_FEC_AUTO;
985 985 fec &= ~LINK_FEC_AUTO;
986 986 } else if ((fec & LINK_FEC_NONE) != 0) {
987 987 req_fec = 0;
988 988 fec &= ~LINK_FEC_NONE;
989 989 } else {
990 990 req_fec = 0;
991 991 if ((fec & LINK_FEC_BASE_R) != 0) {
992 992 req_fec |= I40E_AQ_SET_FEC_ABILITY_KR |
993 993 I40E_AQ_SET_FEC_REQUEST_KR;
994 994 fec &= ~LINK_FEC_BASE_R;
995 995 }
996 996 if ((fec & LINK_FEC_RS) != 0) {
997 997 req_fec |= I40E_AQ_SET_FEC_ABILITY_RS |
998 998 I40E_AQ_SET_FEC_REQUEST_RS;
999 999 fec &= ~LINK_FEC_RS;
1000 1000 }
1001 1001 if (req_fec == 0)
1002 1002 return (EINVAL);
1003 1003 }
1004 1004
1005 1005 /*
1006 1006 * if fec is not zero now, then there is an invalid fec or
1007 1007 * combination of settings.
1008 1008 */
1009 1009 if (fec != 0)
1010 1010 return (EINVAL);
1011 1011
1012 1012 if (i40e_aq_get_phy_capabilities(hw, B_FALSE, B_FALSE, &abilities,
1013 1013 NULL) != I40E_SUCCESS)
1014 1014 return (EIO);
1015 1015
1016 1016 bzero(&config, sizeof (config));
1017 1017 config.abilities = abilities.abilities;
1018 1018 /* Restart the link */
1019 1019 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1020 1020 config.phy_type = abilities.phy_type;
1021 1021 config.phy_type_ext = abilities.phy_type_ext;
1022 1022 config.link_speed = abilities.link_speed;
1023 1023 config.eee_capability = abilities.eee_capability;
1024 1024 config.eeer = abilities.eeer_val;
1025 1025 config.low_power_ctrl = abilities.d3_lpan;
1026 1026 config.fec_config = req_fec & I40E_AQ_PHY_FEC_CONFIG_MASK;
1027 1027 if (i40e_aq_set_phy_config(hw, &config, NULL) != I40E_SUCCESS)
1028 1028 return (EIO);
1029 1029
1030 1030 if (i40e_update_link_info(hw) != I40E_SUCCESS)
1031 1031 return (EIO);
1032 1032
1033 1033 i40e->i40e_fec_requested = fec_requested;
1034 1034
1035 1035 return (0);
1036 1036 }
1037 1037 static int
1038 1038 i40e_m_setprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
1039 1039 uint_t pr_valsize, const void *pr_val)
1040 1040 {
1041 1041 uint32_t new_mtu;
1042 1042 link_fec_t fec;
1043 1043 i40e_t *i40e = arg;
1044 1044 int ret = 0;
1045 1045
1046 1046 mutex_enter(&i40e->i40e_general_lock);
1047 1047 if (i40e->i40e_state & I40E_SUSPENDED) {
1048 1048 mutex_exit(&i40e->i40e_general_lock);
1049 1049 return (ECANCELED);
1050 1050 }
1051 1051
1052 1052 switch (pr_num) {
1053 1053 /*
1054 1054 * These properties are always read-only across every device.
1055 1055 */
1056 1056 case MAC_PROP_DUPLEX:
1057 1057 case MAC_PROP_SPEED:
1058 1058 case MAC_PROP_STATUS:
1059 1059 case MAC_PROP_ADV_100FDX_CAP:
1060 1060 case MAC_PROP_ADV_1000FDX_CAP:
1061 1061 case MAC_PROP_ADV_2500FDX_CAP:
1062 1062 case MAC_PROP_ADV_5000FDX_CAP:
1063 1063 case MAC_PROP_ADV_10GFDX_CAP:
1064 1064 case MAC_PROP_ADV_25GFDX_CAP:
1065 1065 case MAC_PROP_ADV_40GFDX_CAP:
1066 1066 ret = ENOTSUP;
1067 1067 break;
1068 1068 /*
1069 1069 * These are read-only at this time as we don't support configuring
1070 1070 * auto-negotiation. See the theory statement in i40e_main.c.
1071 1071 */
1072 1072 case MAC_PROP_EN_100FDX_CAP:
1073 1073 case MAC_PROP_EN_1000FDX_CAP:
1074 1074 case MAC_PROP_EN_2500FDX_CAP:
1075 1075 case MAC_PROP_EN_5000FDX_CAP:
1076 1076 case MAC_PROP_EN_10GFDX_CAP:
1077 1077 case MAC_PROP_EN_25GFDX_CAP:
1078 1078 case MAC_PROP_EN_40GFDX_CAP:
1079 1079 case MAC_PROP_AUTONEG:
1080 1080 case MAC_PROP_FLOWCTRL:
1081 1081 ret = ENOTSUP;
1082 1082 break;
1083 1083
1084 1084 case MAC_PROP_MTU:
1085 1085 bcopy(pr_val, &new_mtu, sizeof (new_mtu));
1086 1086 if (new_mtu == i40e->i40e_sdu)
1087 1087 break;
1088 1088
1089 1089 if (new_mtu < I40E_MIN_MTU ||
1090 1090 new_mtu > I40E_MAX_MTU) {
1091 1091 ret = EINVAL;
1092 1092 break;
1093 1093 }
1094 1094
1095 1095 if (i40e->i40e_state & I40E_STARTED) {
1096 1096 ret = EBUSY;
1097 1097 break;
1098 1098 }
1099 1099
1100 1100 ret = mac_maxsdu_update(i40e->i40e_mac_hdl, new_mtu);
1101 1101 if (ret == 0) {
1102 1102 i40e->i40e_sdu = new_mtu;
1103 1103 i40e_update_mtu(i40e);
1104 1104 }
1105 1105 break;
1106 1106
1107 1107 case MAC_PROP_EN_FEC_CAP:
1108 1108 bcopy(pr_val, &fec, sizeof (fec));
1109 1109
1110 1110 ret = i40e_update_fec(i40e, fec);
1111 1111 break;
1112 1112
1113 1113 case MAC_PROP_PRIVATE:
1114 1114 ret = i40e_m_setprop_private(i40e, pr_name, pr_valsize, pr_val);
1115 1115 break;
1116 1116 default:
1117 1117 ret = ENOTSUP;
1118 1118 break;
1119 1119 }
1120 1120
1121 1121 mutex_exit(&i40e->i40e_general_lock);
1122 1122 return (ret);
1123 1123 }
1124 1124
1125 1125 static link_fec_t
1126 1126 i40e_fec_to_linkfec(struct i40e_hw *hw)
1127 1127 {
1128 1128 struct i40e_link_status *ls = &hw->phy.link_info;
1129 1129
1130 1130 if ((ls->fec_info & I40E_AQ_CONFIG_FEC_KR_ENA) != 0)
1131 1131 return (LINK_FEC_BASE_R);
1132 1132
1133 1133 if ((ls->fec_info & I40E_AQ_CONFIG_FEC_RS_ENA) != 0)
1134 1134 return (LINK_FEC_RS);
1135 1135
1136 1136 return (LINK_FEC_NONE);
1137 1137 }
1138 1138
1139 1139 static int
1140 1140 i40e_m_getprop(void *arg, const char *pr_name, mac_prop_id_t pr_num,
1141 1141 uint_t pr_valsize, void *pr_val)
1142 1142 {
1143 1143 i40e_t *i40e = arg;
1144 1144 uint64_t speed;
1145 1145 int ret = 0;
1146 1146 uint8_t *u8;
1147 1147 link_flowctrl_t fctl;
1148 1148
1149 1149 mutex_enter(&i40e->i40e_general_lock);
1150 1150
1151 1151 switch (pr_num) {
1152 1152 case MAC_PROP_DUPLEX:
1153 1153 if (pr_valsize < sizeof (link_duplex_t)) {
1154 1154 ret = EOVERFLOW;
1155 1155 break;
1156 1156 }
1157 1157 bcopy(&i40e->i40e_link_duplex, pr_val, sizeof (link_duplex_t));
1158 1158 break;
1159 1159 case MAC_PROP_SPEED:
1160 1160 if (pr_valsize < sizeof (uint64_t)) {
1161 1161 ret = EOVERFLOW;
1162 1162 break;
1163 1163 }
1164 1164 speed = i40e->i40e_link_speed * 1000000ULL;
1165 1165 bcopy(&speed, pr_val, sizeof (speed));
1166 1166 break;
1167 1167 case MAC_PROP_STATUS:
1168 1168 if (pr_valsize < sizeof (link_state_t)) {
1169 1169 ret = EOVERFLOW;
1170 1170 break;
1171 1171 }
1172 1172 bcopy(&i40e->i40e_link_state, pr_val, sizeof (link_state_t));
1173 1173 break;
1174 1174 case MAC_PROP_AUTONEG:
1175 1175 if (pr_valsize < sizeof (uint8_t)) {
1176 1176 ret = EOVERFLOW;
1177 1177 break;
1178 1178 }
1179 1179 u8 = pr_val;
1180 1180 *u8 = 1;
1181 1181 break;
1182 1182 case MAC_PROP_FLOWCTRL:
1183 1183 /*
1184 1184 * Because we don't currently support hardware flow control, we
1185 1185 * just hardcode this to be none.
1186 1186 */
1187 1187 if (pr_valsize < sizeof (link_flowctrl_t)) {
1188 1188 ret = EOVERFLOW;
1189 1189 break;
1190 1190 }
1191 1191 fctl = LINK_FLOWCTRL_NONE;
1192 1192 bcopy(&fctl, pr_val, sizeof (link_flowctrl_t));
1193 1193 break;
1194 1194 case MAC_PROP_MTU:
1195 1195 if (pr_valsize < sizeof (uint32_t)) {
1196 1196 ret = EOVERFLOW;
1197 1197 break;
1198 1198 }
1199 1199 bcopy(&i40e->i40e_sdu, pr_val, sizeof (uint32_t));
1200 1200 break;
1201 1201 case MAC_PROP_ADV_FEC_CAP:
1202 1202 if (pr_valsize < sizeof (link_fec_t)) {
1203 1203 ret = EOVERFLOW;
1204 1204 break;
1205 1205 }
1206 1206 *(link_fec_t *)pr_val =
1207 1207 i40e_fec_to_linkfec(&i40e->i40e_hw_space);
1208 1208 break;
1209 1209 case MAC_PROP_EN_FEC_CAP:
1210 1210 if (pr_valsize < sizeof (link_fec_t)) {
1211 1211 ret = EOVERFLOW;
1212 1212 break;
1213 1213 }
1214 1214 *(link_fec_t *)pr_val = i40e->i40e_fec_requested;
1215 1215 break;
1216 1216
1217 1217 /*
1218 1218 * Because we don't let users control the speeds we may auto-negotiate
1219 1219 * to, the values of the ADV_ and EN_ will always be the same.
1220 1220 */
1221 1221 case MAC_PROP_ADV_100FDX_CAP:
1222 1222 case MAC_PROP_EN_100FDX_CAP:
1223 1223 if (pr_valsize < sizeof (uint8_t)) {
1224 1224 ret = EOVERFLOW;
1225 1225 break;
1226 1226 }
1227 1227 u8 = pr_val;
1228 1228 *u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_100MB) != 0;
1229 1229 break;
1230 1230 case MAC_PROP_ADV_1000FDX_CAP:
1231 1231 case MAC_PROP_EN_1000FDX_CAP:
1232 1232 if (pr_valsize < sizeof (uint8_t)) {
1233 1233 ret = EOVERFLOW;
1234 1234 break;
1235 1235 }
1236 1236 u8 = pr_val;
1237 1237 *u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_1GB) != 0;
1238 1238 break;
1239 1239 case MAC_PROP_ADV_2500FDX_CAP:
1240 1240 case MAC_PROP_EN_2500FDX_CAP:
1241 1241 if (pr_valsize < sizeof (uint8_t)) {
1242 1242 ret = EOVERFLOW;
1243 1243 break;
1244 1244 }
1245 1245 u8 = pr_val;
1246 1246 *u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_2_5GB) != 0;
1247 1247 break;
1248 1248 case MAC_PROP_ADV_5000FDX_CAP:
1249 1249 case MAC_PROP_EN_5000FDX_CAP:
1250 1250 if (pr_valsize < sizeof (uint8_t)) {
1251 1251 ret = EOVERFLOW;
1252 1252 break;
1253 1253 }
1254 1254 u8 = pr_val;
1255 1255 *u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_5GB) != 0;
1256 1256 break;
1257 1257 case MAC_PROP_ADV_10GFDX_CAP:
1258 1258 case MAC_PROP_EN_10GFDX_CAP:
1259 1259 if (pr_valsize < sizeof (uint8_t)) {
1260 1260 ret = EOVERFLOW;
1261 1261 break;
1262 1262 }
1263 1263 u8 = pr_val;
1264 1264 *u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_10GB) != 0;
1265 1265 break;
1266 1266 case MAC_PROP_ADV_25GFDX_CAP:
1267 1267 case MAC_PROP_EN_25GFDX_CAP:
1268 1268 if (pr_valsize < sizeof (uint8_t)) {
1269 1269 ret = EOVERFLOW;
1270 1270 break;
1271 1271 }
1272 1272 u8 = pr_val;
1273 1273 *u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_25GB) != 0;
1274 1274 break;
1275 1275 case MAC_PROP_ADV_40GFDX_CAP:
1276 1276 case MAC_PROP_EN_40GFDX_CAP:
1277 1277 if (pr_valsize < sizeof (uint8_t)) {
1278 1278 ret = EOVERFLOW;
1279 1279 break;
1280 1280 }
1281 1281 u8 = pr_val;
1282 1282 *u8 = (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_40GB) != 0;
1283 1283 break;
1284 1284 case MAC_PROP_PRIVATE:
1285 1285 ret = i40e_m_getprop_private(i40e, pr_name, pr_valsize, pr_val);
1286 1286 break;
1287 1287 default:
1288 1288 ret = ENOTSUP;
1289 1289 break;
1290 1290 }
1291 1291
1292 1292 mutex_exit(&i40e->i40e_general_lock);
1293 1293
1294 1294 return (ret);
1295 1295 }
1296 1296
1297 1297 static void
1298 1298 i40e_m_propinfo(void *arg, const char *pr_name, mac_prop_id_t pr_num,
1299 1299 mac_prop_info_handle_t prh)
1300 1300 {
1301 1301 i40e_t *i40e = arg;
1302 1302
1303 1303 mutex_enter(&i40e->i40e_general_lock);
1304 1304
1305 1305 switch (pr_num) {
1306 1306 case MAC_PROP_DUPLEX:
1307 1307 case MAC_PROP_SPEED:
1308 1308 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1309 1309 break;
1310 1310 case MAC_PROP_FLOWCTRL:
1311 1311 /*
1312 1312 * At the moment, the driver doesn't support flow control, hence
1313 1313 * why this is set to read-only and none.
1314 1314 */
1315 1315 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1316 1316 mac_prop_info_set_default_link_flowctrl(prh,
1317 1317 LINK_FLOWCTRL_NONE);
1318 1318 break;
1319 1319 case MAC_PROP_MTU:
1320 1320 mac_prop_info_set_range_uint32(prh, I40E_MIN_MTU, I40E_MAX_MTU);
1321 1321 break;
1322 1322 case MAC_PROP_ADV_FEC_CAP:
1323 1323 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1324 1324 if (i40e_is_25G_device(i40e->i40e_hw_space.device_id))
1325 1325 mac_prop_info_set_default_fec(prh, LINK_FEC_AUTO);
1326 1326 break;
1327 1327 case MAC_PROP_EN_FEC_CAP:
1328 1328 if (i40e_is_25G_device(i40e->i40e_hw_space.device_id)) {
1329 1329 mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW);
1330 1330 mac_prop_info_set_default_fec(prh, LINK_FEC_AUTO);
1331 1331 } else {
1332 1332 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1333 1333 }
1334 1334 break;
1335 1335
1336 1336 /*
1337 1337 * We set the defaults for these based upon the phy's ability to
1338 1338 * support the speeds. Note, auto-negotiation is required for fiber,
1339 1339 * hence it is read-only and always enabled. When we have access to
1340 1340 * copper phys we can revisit this.
1341 1341 */
1342 1342 case MAC_PROP_AUTONEG:
1343 1343 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1344 1344 mac_prop_info_set_default_uint8(prh, 1);
1345 1345 break;
1346 1346 case MAC_PROP_ADV_100FDX_CAP:
1347 1347 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1348 1348 mac_prop_info_set_default_uint8(prh,
1349 1349 (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_100MB) != 0);
1350 1350 break;
1351 1351 case MAC_PROP_EN_100FDX_CAP:
1352 1352 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1353 1353 mac_prop_info_set_default_uint8(prh,
1354 1354 (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_100MB) != 0);
1355 1355 break;
1356 1356 case MAC_PROP_ADV_1000FDX_CAP:
1357 1357 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1358 1358 mac_prop_info_set_default_uint8(prh,
1359 1359 (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_1GB) != 0);
1360 1360 break;
1361 1361 case MAC_PROP_EN_1000FDX_CAP:
1362 1362 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1363 1363 mac_prop_info_set_default_uint8(prh,
1364 1364 (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_1GB) != 0);
1365 1365 break;
1366 1366 case MAC_PROP_ADV_10GFDX_CAP:
1367 1367 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1368 1368 mac_prop_info_set_default_uint8(prh,
1369 1369 (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_10GB) != 0);
1370 1370 break;
1371 1371 case MAC_PROP_EN_10GFDX_CAP:
1372 1372 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1373 1373 mac_prop_info_set_default_uint8(prh,
1374 1374 (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_10GB) != 0);
1375 1375 break;
1376 1376 case MAC_PROP_ADV_25GFDX_CAP:
1377 1377 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1378 1378 mac_prop_info_set_default_uint8(prh,
1379 1379 (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_25GB) != 0);
1380 1380 break;
1381 1381 case MAC_PROP_EN_25GFDX_CAP:
1382 1382 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1383 1383 mac_prop_info_set_default_uint8(prh,
1384 1384 (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_25GB) != 0);
1385 1385 break;
1386 1386 case MAC_PROP_ADV_40GFDX_CAP:
1387 1387 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1388 1388 mac_prop_info_set_default_uint8(prh,
1389 1389 (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_40GB) != 0);
1390 1390 break;
1391 1391 case MAC_PROP_EN_40GFDX_CAP:
1392 1392 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ);
1393 1393 mac_prop_info_set_default_uint8(prh,
1394 1394 (i40e->i40e_phy.link_speed & I40E_LINK_SPEED_40GB) != 0);
1395 1395 break;
1396 1396 case MAC_PROP_PRIVATE:
1397 1397 i40e_m_propinfo_private(i40e, pr_name, prh);
1398 1398 break;
1399 1399 default:
1400 1400 break;
1401 1401 }
1402 1402
1403 1403 mutex_exit(&i40e->i40e_general_lock);
1404 1404 }
1405 1405
1406 1406 #define I40E_M_CALLBACK_FLAGS \
1407 1407 (MC_IOCTL | MC_GETCAPAB | MC_SETPROP | MC_GETPROP | MC_PROPINFO)
1408 1408
1409 1409 static mac_callbacks_t i40e_m_callbacks = {
1410 1410 I40E_M_CALLBACK_FLAGS,
1411 1411 i40e_m_stat,
1412 1412 i40e_m_start,
1413 1413 i40e_m_stop,
1414 1414 i40e_m_promisc,
1415 1415 i40e_m_multicast,
1416 1416 NULL,
1417 1417 NULL,
1418 1418 NULL,
1419 1419 i40e_m_ioctl,
1420 1420 i40e_m_getcapab,
1421 1421 NULL,
1422 1422 NULL,
1423 1423 i40e_m_setprop,
1424 1424 i40e_m_getprop,
1425 1425 i40e_m_propinfo
1426 1426 };
1427 1427
1428 1428 boolean_t
1429 1429 i40e_register_mac(i40e_t *i40e)
1430 1430 {
1431 1431 struct i40e_hw *hw = &i40e->i40e_hw_space;
1432 1432 int status;
1433 1433 mac_register_t *mac = mac_alloc(MAC_VERSION);
1434 1434
1435 1435 if (mac == NULL)
1436 1436 return (B_FALSE);
1437 1437
1438 1438 mac->m_type_ident = MAC_PLUGIN_IDENT_ETHER;
1439 1439 mac->m_driver = i40e;
1440 1440 mac->m_dip = i40e->i40e_dip;
1441 1441 mac->m_src_addr = hw->mac.addr;
1442 1442 mac->m_callbacks = &i40e_m_callbacks;
1443 1443 mac->m_min_sdu = 0;
1444 1444 mac->m_max_sdu = i40e->i40e_sdu;
1445 1445 mac->m_margin = VLAN_TAGSZ;
1446 1446 mac->m_priv_props = i40e_priv_props;
1447 1447 mac->m_v12n = MAC_VIRT_LEVEL1;
1448 1448
1449 1449 status = mac_register(mac, &i40e->i40e_mac_hdl);
1450 1450 if (status != 0)
1451 1451 i40e_error(i40e, "mac_register() returned %d", status);
1452 1452 mac_free(mac);
1453 1453
1454 1454 return (status == 0);
1455 1455 }
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